another small breakthrough on our NERD technology.

[TinselKoala]

TK,

Excellent write up of that last test.

So, I am now more confused as to why Q1 seems to be performing as expected sometimes, and not so much at other times.  In the captures where Q1 does not seem to be turning on, the gate drive appears higher than the captures where Q1 is obviously functioning.  The higher gate drive should turn it on harder.

Any thoughts?

PW

Thanks. Rosemary might not agree with you though.

You bet I have thoughts. She is operating with a blown mosfet and doesn't realize it (it is easy to do... I know whereof I speak here), they've gotten their filenames mixed up, and there isn't anything except the oscillation heating happening in those traces. The high-heat traces that are verifiable all show operating mosfet(s) like the annotated shot above.
At various times she has claimed that the mosfets don't get warm during operation, and that several mosfets had to be replaced. Putting two and two together.... we find one obvious answer.

The problem with Rosemary's program, as I've said before, is that it is NOT difficult to reproduce most of her data. It is when she starts doing "math" on stuff that she goes astray, and also there's that fundamental pig-headedness that prevents her from seriously considering that she might be wrong about _anything_. So she collects data, and when you finally figure out under what crazy conditions that data was collected, you can do it too, easily. But when you collect the _right_ data to answer the fundamental questions, you find standard circuit behaviour accounts for all the data that at first seemed so crazy... and of course the fundamental claim breaks down at that point.

[TinselKoala]

I forgot to mention that the inline ammeter indicates zero current as the DC offset is increased from 0 going negative, until the oscillations begin at around -3 or -4 volts or so. Then the ammeter jumps up to around 10-20 mA at oscillation onset, and as I increase the FG offset to around -12 volts the ammeter indicates a smooth rise to 200mA, and could go higher if the FG is set more negative.
Going positive it takes a full +5 volts to turn on the Q1 and it's pretty much fully on at 7 volts, no oscillations of course.

Load is at 110 F, batt voltage 36.3      still running 200 mA on the inline meter.

So it seems clear that the amplitude of the oscillations can set the level of the small current passing around the circuit, and this level in turn is set by the negative bias on Q2's source pins from the FG's negative voltage excursions, or in the present test, straight DC. Looking at the drain trace at 50 v/div and cranking the FG max negative so there are 340 mA on the inline meter, I see apparent oscillation amplitude of 120 V p-p.

[picowatt]

TK,
That would mean a blown mosfet was replaced between March 2 and March 12 2011, and then another Q1 failure happened before April 30.

Do you really think that's possible?  I would've thought that if and when a blown mosfet was noticed, that would have triggered a review of the data to find out when it happened.  Possibly the mystery is as simple as you say, but still, somewhat difficult for me to believe. 

PW

[picowatt]

I forgot to mention that the inline ammeter indicates zero current as the DC offset is increased from 0 going negative, until the oscillations begin at around -3 or -4 volts or so. Then the ammeter jumps up to around 10-20 mA at oscillation onset, and as I increase the FG offset to around -12 volts the ammeter indicates a smooth rise to 200mA, and could go higher if the FG is set more negative.
Going positive it takes a full +5 volts to turn on the Q1 and it's pretty much fully on at 7 volts, no oscillations of course.

Load is at 110 F, batt voltage 36.3      still running 200 mA on the inline meter.

So, it is possible that the bias current can be as low as 10-20 ma and still oscillate.  Then depending on Rosemary's FG settings, it is possible the bias current discussed is much lower in some of the tests.  I note only one test in the paper where it was specifically stated that the FG was set to its full negative offset.

PW

[TinselKoala]

TK,
That would mean a blown mosfet was replaced between March 2 and March 12 2011, and then another Q1 failure happened before April 30.

Do you really think that's possible?  I would've thought that if and when a blown mosfet was noticed, that would have triggered a review of the data to find out when it happened.  Possibly the mystery is as simple as you say, but still, somewhat difficult for me to believe. 

PW

I added a paragraph to that last post you  might not have seen yet.

What is more difficult to believe, considering the gaffes we've already uncovered, and Rosemary's general attitude and mode of discourse: that they blew mosfets and didn't notice it, or that they have discovered a self-recharging battery heating system that makes energy out of 2c tachyons somehow?

In the case of the COP>17 device, the mystery was as simple as an inverted duty cycle caused by them thinking that HIGH drain voltage meant the mosfet was ON. And it took me literally months to convince Rosemary that the cycle of the simple timer was indeed inverted. She still doesn't believe it, but everyone who actually built it found the same thing.

As to the Q1 failures: look at the history. The first instantiation used only the single Q1 mosfet on a small uchannel heatsink. And they were claiming to use a 72 volt battery pack at that time. High heat mode, positive gate drive == blown mosfet under those conditions. So they reduced their battery pack to 60 volts and added 4 more mosfets in strict parallel to handle the current, and placed them on big heatsinks. BUT THEY WIRED THE 4 IN WRONG accidentally and the story of the Q2 oscillations begins. Q1, remember, is still on a small heatsink, the Q2s are in backwards, the negative pulses make small heat by oscillating the Q2s while Q1 is resting, out of the circuit, or open completely. They do go open, or as the one I've got, go partially shorted, as well as completely shorted.  Now they still think they are operating with 5 mosfets in strict parallel-- view the video for the diagram and the narration. So now, when they go again for high heat mode.... they now stress Q1 again, and if it's blown it doesn't heat, so they look and replace it and put a little better heatsink on it... but they still think they are in strict parallel, so they go again... and it blows again, with the 60 volt pack. So... and I believe this is the smoking gun that justifies this chain of reasoning--- they pull out yet another battery, leaving only 48 volts to use for the high heat mode, and the Q1 survives, barely.
It was only later on, well after that March demo, that the "mistake" was discovered and the correct schematic, showing the separation of Q1 and the Q2s, was figured out by .99, I think.
So yes, I believe they blew the Q1 mosfet several times, from overheat stress, which could leave it open, which wouldn't even show up in the low heat, Q2 oscillating mode.