Testing the TK Tar Baby

[TinselKoala]

.99,

I have suggested a few times that a 50R be placed in the source leg of Q2 and that the gate be biased at a positive voltage to keep Q2 operating (similar to your circuit).  A 1meg pot across the first Batt+ with the wiper tied to the gate circuit (AC decoupled) would allow the operating bias of Q2 to be set/varied.  This would only draw 12-14ua. from the first battery (depending on its voltage).  Alternately, the gate coud be tied to the first Batt+ directly through a series resistor/cap to ground (for decoupling) and only the decoupling cap and gate leakage current would be drawn from the first battery.  The value of the 50R at the source could be modified to set the Q2 operating (bias) current.

PW

I agree, this would be a good way to make stable and adjustable oscillations, better than the simple battery-pot idea (which does work but is kind of twitchy). But if this is done, obviously the power contribution of the bias source is eliminated. Is it then a NERD circuit any more?  This is why I didn't pursue the optocoupler idea earlier. I think now I could get it to work, but again... the isolation defeats the functioning of the NERD circuit.
This is also my objection to MH's LEDs of Doom. The LED is a diode after all, rectifying what it sees ... and inserting it into the circuit, even bidirectionally, might interfere with the "normal" current paths and thus void the warranty.

[picowatt]

Hmmm... I think I'm understanding this a bit more now.

The negative potential on the Q2 source pins effectively increases the potential difference between the gate and the source, with the gate being more positive... even though it's held at "zero" volts by the gate drive pulsation baseline. When the negative potential on Q2 source becomes great enough-- 4 or so volts negative wrt the gate at "zero" volts.... the mosfets begin to conduct a little and the oscillations start. Once the oscs start they provide a rising and falling potential difference between the Q2 gates and sources.... in other words, feedback oscillations.

In other words, PW and .99 seem to be describing the same thing, from different sides of the coin, if I am understanding correctly.

Is the power from the negative bias source being mixed in with the main battery power being partially switched by the mosfets during the oscillations? How does this happen if it does?  Is it coupled capacitatively through the gate-drain capacitance?

TK,

Hey, I thought you had "real work" to do today!

Your questions are good ones.  Regarding the bias source, that is why I asked what your 555 circuit's supply was drawing when it has Q2 oscillating.  If your Q2 bias is 150ma. for example, I would think your 555 supply will be showing a total current draw equal to the 150ma bias current plus 555 quiescent current.

For DC, the current path is through whatever is providing the turn on bias supply for Q2.  For AC, the path is through both the bias supply and the Ciss of the MOSFETs.  When the FG was used, its Rgen=50R was a lesser path for AC than the Ciss of the MOSFETs.  With your 555's 10R source, the 10R is probably close to an equal path for AC, as the 10R is close to the Ciss reactance at 1.5MHz.

PW

[picowatt]

TK,

If you look at the first paper's schematic, it at first appears that the only path for AC at the source of Q2 is through the FG.  But, if you draw in the gate to source capacitance, Ciss, you will see that the Ciss is effectively across the FG terminals and therefore allows a portion of the AC current to bypass the FG.  The Ciss of a single IRFPG50 is somewhere around 2800pF.  Four Q2's in parallel make the total Ciss around 11,200pF, and at 1.5Mhz, this represents a fairly low impedance path around the FG's 50R.

I am still considering how the drain to gate capacitance, Coss, comes into play.  Coss will allow an amount of AC to be applied to the CSR, and hence thru the FG and Ciss, effectively be negative feedback.  Add some phase shift (inductance) and negative feedback can easily become positive feedback, i.e., an oscillator. 

The amount of negative feedback at AC that Coss provides is a bit complicated, as the inductance of the CSR, the DC resistance of the CSR, the reactance of Ciss, the Rgen, and any stray inductance/capacitance would all come into play in dividing the negative FB and setting the Q2 AC gain or alternately, and/or as well, providing the phase shift necessary to cause the oscillation.  That is how I see it anyway.

.99 could probably be more quantitative in this regard with his sim probing.

PW

[poynt99]

Just to clarify one point;

"bias" means a certain amount of pos. DC V_GS. This can be completely floating wrt the rest of the circuit.

So HOW you provide that bias, makes no difference whatsoever, it can be positive, negative, as long as V_GS is slightly positive, say about 5V.

I have simulated both cases, where the bias is applied to the Source and the Gate. In other words, I have proven what I wrote above.

[poynt99]

.99 could probably be more quantitative in this regard with his sim probing.

PW

If you want to see something specific on any of the circuits, simply ask.