Kapanadze Cousin - DALLY FREE ENERGY

[itsu]

Itsu, in addition the diode in parallel with the resistance at your snubber, is upside down compares to akula. Check this in case..

Jeg,

i remember we had this discussion before, i think Hoppy did mention that a few years ago, it was of no influence if i remember correctly.
Anyway, i changed them around, but the signals / behaviour stays the same.

Thanks,  itsu

[verpies]

Also puzzeled about the gate signals which seems to "lag" its drain signal, how can that be?
I am puzzeled about the drain starting signal which starts high, then falls of to the normal 48V. What is causing that?

I think it is caused by improper output signal configuration of the TL494.

If you are really using the UCC37322 drivers then the TL494 (U3) should be connected to them like this:
U3.pin9 --> U2.pin2
U2.pin2 --> 100Ω resistor --> GND
U3.pin10 --> U1.pin2
U1.pin2 --> 100Ω resistor --> GND
U3.pin8 --> Vcc
U3.pin11 --> Vcc
U3.pin13 --> U3.pin14


However, if you are using the UCC37321 drivers then the TL494 (U3) should be connected to them like this:
U3.pin8 --> U2.pin2
U2.pin2 --> 100Ω resistor --> Vcc
U3.pin11 --> U1.pin2
U1.pin2 --> 100Ω resistor --> Vcc
U3.pin9 --> GND
U3.pin10 --> GND
U3.pin13 --> U3.pin14


P.S.
I think the UCC37321 has a little better dynamic specs than the UCC37322.   I did not check if they cost the same, though.

[itsu]

verpies,

I am 99.9% sure i have 2x UCC37322 (non inverting) but i cannot check the markings anymore as they are soldered directly onto the MOSFETs
However, checking the input signal on pins 2 and the output signal on pins 6/7 shows they are similar, so not inverted.

I do have the below mentioned connections for UCC37322, only difference is that i use 1K resistors (so my earlier diagram has an error in U3 pin11, which should be U3 pin 10)

If you are really using the UCC37322 drivers then the TL494 (U3) should be connected to them like this:
U3.pin9 --> U2.pin2
U3.pin9 --> 100Ω resistor --> GND
U3.pin10 --> U1.pin2
U3.pin10 --> 100Ω resistor --> GND
U3.pin8 --> Vcc
U3.pin11 --> Vcc
U3.pin13 --> U3.pin14

Itsu

[skywalker66]

Itsu,

if you disconnect snubbers or/and the 2 tvs (D7, D8) the lag between gate and drain keep the same ?
Usually snubbers are placed across coils and much less sourse-drain of mosfets.   
Try at first disconnecting the 2 tvs and note the difference, and then snubbers.

[verpies]

It seems you got an error in your setup. Your 2 x12 turns primaries look like being in bucking mode, which is wrong.

I don't know what you mean by "bucking" since the these two halves of the primary winding are not supposed to be driven both ON at the same time, thus the fluxes generated by these windings cannot buck.

Anyway, since the goal is to produce bipolar alternating flux in the core, then these primary winding halves are supposed to be connected in such manner that when the 1^st MOSFET is ON, then the flux in the core is generated in one direction and when the 2^nd MOSFET is ON, then the flux in the core is generated in the other direction. 
An alternating flux, generates an AC across a resistive load connected to the secondary winding.

The black dots A & B, on the diagram below, illustrate the proper split-primary winding connections according to the dot convention.
The orange parts of winding W1 (dots C & D) as well as C3/D3 and C4/D4 are components of the optional lossless clamps.

As I want to stay as close to the original plans as possible, ...

...and that is the only reason not to use the lossless clamps which are more effective and more efficient than RCD snubbers.