Kapanadze Cousin - DALLY FREE ENERGY

[magpwr]

I watched your video again and I noticed, that while you have the primary windings disconnected and dummy resistors connected in their place, then the drain voltage falls rapidly when the gate goes high, but the drain voltage rises slowly (appears rounded off) when the gate goes low.

With resistive loads, the rise times and fall times of the drains should follow the rise times and fall times of the gates, but they do not.

This leads me to the conclusion that your MOSFET driving circuit sources a lot of current but sinks very little current and does not discharge the gate quickly to ground and does not keep it well grounded, leaving it defenseless against Miller turn-ON.

Why would that be?
Maybe the driver's "enable" input is not tied up ?  Maybe the driver is half-blown?  ...or the driver has a grounding problem?  ...or a diode is between the driver and the gate instead of a low-ohm resistor?  ...or the gate resistor is fried, ...or the gate resistor is accidentally a high-ohm resistor in parallel with a diode ..."Bad Boys Rаpe Our Young Girls, But..."

hi verpies,

There is 3 possible reasons why there can be rounded edge waveform across gate source of Mosfet.Let me put it in one sentence.Maybe one will help for itsu case.

Ans:There is few possibility the gate capacitance of mosfet is high around 8nf to 10nf or more maybe,the resistor value in Ohms implemented was little too high for large gate capacitance or maybe the ESR of decoupling capacitor for the mosfet driver is high which can't  provide sharp rise in waveform and lastly the gate signal is low for mosfet to properly switched on hence it's Rds on is high which is bad.

[Hoppy]

hi verpies,

There is 3 possible reasons why there can be rounded edge waveform across gate source of Mosfet.Let me put it in one sentence.Maybe one will help for itsu case.

Ans:There is few possibility the gate capacitance of mosfet is high around 8nf to 10nf or more maybe,the resistor value in Ohms implemented was little too high for large gate capacitance or maybe the ESR of decoupling capacitor for the mosfet driver is high which can't  provide sharp rise in waveform and lastly the gate signal is low for mosfet to properly switched on hence it's Rds on is high which is bad.

Mag,

I'm not sure that Itsu has any driver decoupling caps soldered where they should be directly across the chip supply rail pins, or very close to them?

[verpies]

There is 3 possible reasons why there can be rounded edge waveform across gate source of Mosfet.

But none of them explain the asymmetry between the falling and rising edge.  See the green and red arrows below:

There is few possibility the gate capacitance of mosfet is high around 8nf to 10nf

The data sheet lists the input capacitance at 5.2nF
With 1.8Ω gate resistor the RC time constant is 9.4ns so the 99.3% rise & fall time should be 47ns.
Because this capacitance is the same during the rise and fall times, they should be the same, but they are not.

Note, that the scopeshot below was taken at 20μs/div which is 426 times slower than the calculated rise time!

maybe the ESR of decoupling capacitor for the mosfet driver is high which can't  provide sharp rise in waveform

Itsu's gate signal has a short rise time as evidenced by the short fall time of his drain voltage.  It is the rise time of his drain voltage which is the problem.  This drain rise time should be even shorter than the fall time because he has a BAT42 speed-up diode in parallel with his gate resistor ...but the opposite happens.

The ESR of the bypass capacitor would affect the gate's rise time and drain's fall time, but not gate's fall time and drain's rise time, because this bypass capacitor does not supply current when the gate is being discharged.

This asymmetry should not happen with a resistive load ...unless his snubbers make the load asymmetrical and not so resistive.

[magpwr]

Mag,

I'm not sure that Itsu has any driver decoupling caps soldered where they should be directly across the chip supply rail pins, or very close to them?

hi Hoppy,

My quite recent discovery ESR of the capacitor do play a vital role.Typically we go for 1000uf or 2200uf along with 100 or 220nf ceramic cap for mosfet driver.
Unfortunately i do not own a ESR tester yet. .It will be resolved in due time.

Single mosfet driver-
Not forgetting the pin 1 and 8 is typically the positive / pin4,5 negative which needs to be properly soldered underneath Mosfet driver.

I do admit the 8 pin  socket and thin connector output itself do pose a small problem related to inductance.But it's not a big issue for frequency below 40khz with 7% to 45% duty.

The reason why i am easily able to directly drive a 1.2KV mosfet from my 3825N PWM 1.5Amps out I/C using 2.2ohms 2watt resistor with SS36 or 1n5819 diode clamp in parallel is because the gate capacitance of the Silicon carbide mosfet is mere ""950pf"".

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Related to Oleg-sergey hybrid setup i have just implemented a on breadboard clock driver in place of PWM driver and my function generator.This just a temp setup in preparation to go battery to measure the current reading to Earth.

My primary objective to get current movement to Earth/water pipe and also test for spark at ferrite rod near Antenna.I may also implement something similar to Geo fusion.


Next objective which i will reveal once tested to be working is get the tesla transponder powered merely by the BEMF.Hence no additional power is needed for transmitter circuit.
If my calculation is correct then part of the circuit(toroid and tesla transponder) is able to powered from 9volts battery without the self run feature.

Please don't even try to mention "ou" ahead of me.I will get pissed. 

[itsu]

verpies,

I had to check myself, but  this "drain waveform asymmetry and rounding" was with the RC snubber in place but without the BAT 46 diodes.

I will add that to the list of checking (removing) tonight


Hoppy,

If the 2*VCC on the drain is (2*24V) 48V, then a 54V TVS across it would normally be alright was my thinking, it will/should cut off anything above 48V (spikes).


I have 0.1uF decoupling caps directly across the drivers + / -  connections, also a 47uF tantalium cap for power boost is across it.

Regards Itsu