Kapanadze Cousin - DALLY FREE ENERGY

[itsu]

Ok,   above last 2 screenshots changed for the current to be measured at point 2.

below screenshot is with gate signal to be 8us

Itsu

[verpies]

I can see reverse current conduction through point 2 (the MOSFET).

Could I bother you for another scopeshot with 8μs gate pulse, but with more than 1 cycle but less than 2 cycles visible,  ...and both gate signals visible ?

Also, I'd appreciate if the current probe was flipped around, so the current looks like it is increasing when the gate signal is high.

[Jeg]

Unfortunately, you placed the current probe in point 1, which makes it impossible to discern whether this current flows through point 2 or 3

First screenshot is with out tvs and snubber.
Looks that when one mosfet stops conducting, the other mosfet experiences reverse current probably through the incorporated diode inside the mosfet. This reverse flow continues until the gate signal opens the switch and mosfet conducts normally. For current to reverse during this transient period, shows that momentarily a negative spike passes through incorporated diode to ground.   

So even each mosfet looks like it opens earlier than it should (before applying gate signal), in reality it is not open.

[verpies]

Looks that when one mosfet stops conducting, the other mosfet experiences reverse current probably through the incorporated diode inside the mosfet.

Yes, but that body diode should be reverse biased and not conducting

[Jeg]

Yes, but that body diode should be reverse biased and not conducting

It is reverse biased. During current reversing, it conducts from ground to drain as ground is at higher potential level due to the negative spike presented at the drain.