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Overunity Machines Forum



Eldarion and Bruce's build of Bob's Energy Converter

Started by eldarion, July 27, 2007, 12:58:39 AM

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Earl

Quote from: eldarion on December 15, 2007, 09:39:56 PM
Hi Mark,

Thanks for the tips!  What I meant when I said falling edge [of the output waveform] was the rising edge of the gate drive, therefore the driven portion of the waveform. ;)

So the MOSFETs' bypass capacitors would be soldered directly across the drain and source of each MOSFET?

There are no capacitors between drain and source of the power MOSFET.  The by-pass capacitors are between driver IC Vdd and ground.

Thanks!

Eldarion

EDIT: Just as I was fearing, there is a problem with the MOSFET drive signal.  Top trace is the gate drive, bottom is the switched end of the primary coil.  I have to think of a good way to get rid of this induction...
"It is through science that we prove, but through intuition that we discover." - H. Poincare

"Most of all, start every day asking yourself what you will do today to make the world a better place to live in."  Mark Snoswell

"As we look ahead, we have an expression in Shell, which we like to use, and that is just as the Stone Age did not end for the lack of rocks, the oil and gas age will not end for the lack oil and gas, but rather technology will move us forward." John Hofmeister, president Shell Oil Company

eldarion

Hi Earl,

That's what I thought!  It wasn't making too much sense to be putting a capacitor on the MOSFET itself. ::)

I have a solution to the gate ringing problem, hopefully.  I will be posting more info and a better quality picture once I have everything soldered up and online.

Eldarion
"The harder the conflict, the more glorious the triumph. What we obtain too cheaply, we esteem too lightly; it is dearness only that gives everything its value."
-- Thomas Paine

eldarion

OK, here it is, gate ringing try 2.

The top picure is the promised better shot of the setup.
The middle picture is the gate drive to the MOSFET.
The bottom picture is the signal to the MOSFET driver from the FPGA.

I really need to get a shielded cable run between the FPGA and the MOSFET drivers to cut down on all the RFI induced in the signal lines when the coil is operational! :o

At least this seems to be a step in the right direction...

Eldarion

P.S. The MOSFET driver chip (the UCC27322) is underneath the ceramic capacitor marked 104.
"The harder the conflict, the more glorious the triumph. What we obtain too cheaply, we esteem too lightly; it is dearness only that gives everything its value."
-- Thomas Paine

MarkSnoswell

So much better than before :) -- actually looks like a half decent square wave pulse now.

I am about to set up a new mosfet driver/switch conbination with 320 - 640 V to the Mosfet switch -- I'll let you know how I go with these higher voltage pulses.

cheers

mark.
Dr Mark Snoswell.
President of the CGSociety www.cgsociety.org

eldarion

Hi Mark,

That sounds interesting!  What MOSFETs are you using for those tests?

I just realized I had forgotten to post a scope shot of the pulse measured at the primary coil itself.  So, here it is.  MUCH improved in my opinion! ;D

Power tests are coming soon...

Eldarion

EDIT: Along with this comes a question for those who may know the answer:
Is the whole point of the fast switching times to generate large, fast, narrow, unidirectional back-EMF spikes that then modulate the HV potential field?  Basically, I need to know whether I should suppress the back-EMF spikes or not!  If the spikes are at the heart of the effect, then I've just removed all chances of my setup working by suppressing them, and would need to get rid of the suppression network.
"The harder the conflict, the more glorious the triumph. What we obtain too cheaply, we esteem too lightly; it is dearness only that gives everything its value."
-- Thomas Paine