Claimed OU circuit of Rosemary Ainslie

[MileHigh]

.99, Glen, All:

2_2us_520V-02_10_11_09.xlr

POS = -3.206W
PIL = 112.3W
PIM = -116.5W
PIS = 0.95W

Final resistor temperature = 135ºF

2_20us_520V-02_10_11_09.xlr

POS = -4.046W
PIL = 100.8W
PIM = -105.7W
PIS = 0.87W

Final resistor temperature = 136ºF

What is "spooky" about these readings is that it looks like the MOSFET is a source of power, and that power is going into the load resistor, the shunt resistor, and the battery.  I double checked the readings with a calculator and they are almost dead on.

PIM(output) = PIL + PIS + POS(input)

I think that .99 also got some results like this that add up like this also.  It seems to suggest that the DSO is doing it's job properly but there is something else going on.  I speculated before that the reactive energy associated with the inductance and capacitance is making it look like this.  This reactive energy would also be conserved also implying that the numbers should balance, which they do.

Certainly we know that the real power dissipated in the load resistor is just a few watts.  That fact can't be ignored.  We also know that the MOSFET is not a source of energy, it dissipates energy.  We also know that the power supply is supplying net positive power and not net negative power.  Anybody who doubts this can replace the battery or power supply with a big fat capacitor and watch the voltage in the capacitor drop as the circuit runs.

It is an interesting mystery for sure.

MileHigh

[Rosemary Ainslie]

Hello MileHigh   

Loved those little molecules that pile in on the end game.  Reminds me of Paul - in a way.

I get it regarding the battery heating. Finally.  I learned from this from Harvey.  After 4 years at this I should have known better.  I have also learned that one can cook a battery with an excessive recharge.  So.  I guess that the 'heating' can indeed result from that spike without necessarily resulting in a recharge.  All of which is relevant.  But not sure that's what's happening here.

In the middle of writing this and saw your last post.  That was more or less going to be the theme here - but handled with much more competence than I could have managed.  Thanks for this MH.  Definitely an honorary troll.  Lol.   

Rosie 

[MileHigh]

I have been thinking a bit more about it while looking a .99's test specification.  What if the power analysis was broken up into separate slices, just to get some better insight into what is going on.

For example, let me discuss the simplest slice, the first slice from the time the MOSFET first switches on to just before the 555 signal goes low and starts the switch-off process.

For the following discussion I am referencing the diagram in .99's test spec.

The DSO will record the voltage across the load resistor (P1 - P2).  This will always be about 20 volts.  The DSO also records the current while this happens based on the shunt resistor voltage (P3 - P4).  This will have a standard exponentially rising curve leveling off at the maximum current.

If you look at the simple analysis of the DSO crunching here, ((volts x current x time)/period), the result of that is an average power in the load resistor during this slice.  However, it is really more complicated than that, because the DSO recorded two things at the same time.  It recorded the resistive power dissipation plus a certain amount of energy stored in the inductive component of the resistor.

Therefore the "average power" during the first time slice is really something like 80% true dissipative power and 20% stored reactive power.  The stored reactive power times the length of the time slice is the stored reactive energy in Joules.

We know that the stored reactive power is just 1/2 L i-squared.   However, we actually can measure this power with the DSO recordings by doing a few manipulations.

When the MOSFET switches on we know that even though we are recording 20 volts across the load resistor, the current starts at zero and starts to climb.  Based on the current waveform, we can deduce the "phantom voltage" due to the resistive dissipation in the load resistor.  By the same token, we know the "phantom voltage compliment" during this time, which is the voltage across the inductance that is part of the load resistor.

That means the DSO, with the help of a few tricks, can actually calculate the energy being accumulated in the inductive component of the resistor.  It is simply the instantaneous "inductor phantom voltage" times the current times the time.  At the end of this first time slice, the integrated energy accumulated in the inductor should be equal to 1/2 L i-squared.   If .99 or Glen know the inductance values in their load resistors the number crunching should check out.

Anyway, the whole point here is to illustrate that the "brute force" DSO recording of the power in the load resistor ((volts x amps x time)/period)) is not the true power dissipated in the load resistor.  The average power calculation would be too high because you have to factor in the fact that the average stored power in the inductive component is added to the true dissipated power.

That's just the first slice, and we know that all hell breaks loose when the MOSFET switches off and the MOSFET capacitance gets charged and the current then reverses direction.

MileHigh

[poynt99]

Indeed MH.

It's a phase shift phenomenon. Remember the SPICE plot I posted showing that the Drain and Shunt spikes should not line up? In theory they shouldn't, and in reality they most likely don't, even though we see it plain and clear in the scope shots.

Referring to the attached SPICE plot of a close-up-view of the switch-OFF part of the cycle, we see clearly in an ideal case what happens. I've set a white vertical cursor right about center of the Drain spike.

Notice how the cursor lines up with 0V on the shunt voltage? That means 0W of power at this instant in time, even though the drain voltage is at it's peak.

You'll also notice that the supply power is not only falling off, but is beginning its recharge phase at this point of 0W from the supply.

The real power in the load resistor RL actually DROPS during this period of time. In our measurements, this is where the load and MOSFET powers are skewed high; the load positive, and the MOSFET negative.

Take a look at the second plot. Interesting that the power trace for the MOSFET is leading the Drain spike by about 90º. Notice at the Drain voltage peak that the MOSFET power is 0W. I wonder what happens when we sample with our probes at a point in the circuit that is OFF the correct phase?

.99

[poynt99]

And finally, just an overall view of the complete pulse...

.99