Rosemary Ainslie circuit demonstration on Saturday March 12th 2011

[i_ron]

I can't do anything about posting over the schematic Ron.  But this is the post
« Reply #347 on: March 26, 2011, 04:09:20 AM »

I think the same schematic is applicable - just add in that MOSFET. 

I'll be able to get hold of the guys early next week and I'll ask them for that schematic they're trying out.  Then I'll post it here.

Hope that helps.  I'm afraid you'll need to be very creative as I absolutely can't help here.

Again, kindest and very best of regards,
Rosie

That sounds good to me Rosemary, thank you.

Harti's circuit is only a one polarity thing but is a starting point.
A logic FET switches at 5 volts but regular FETs like 10 or more to fully turn on, so we will see...

Warm regards,

Ron

[poynt99]

I think it would be beneficial for all at this time to refresh ourselves with the workings of a N-channel MOSFET.

Rose, would you please explain for the readers in a paragraph or two, and in basic terms, how a MOSFET functions? With respect to it's 3 pins, describe what external conditions are necessary on each pin in order to enable the MOSFET to pass a significant current.

Thanks,

.99

[poynt99]

Let's take a small step backward in the progression from the original 5-MOSFET circuit, to the single-MOSFET version I've provided, and re-insert the Q1 MOSFET in place of the parallel diode and capacitor. We can go back to that later.

The Simplification01_schema01.png illustrates this regression. Notice that I have redrawn the diagram slightly, but the connections are still the same as the original circuit.

As I've already well established the fact that only a DC voltage bias is required to set the circuit into oscillation, the function generator is omitted. Because the pulsed output and positive excursions are unnecessary for oscillation, the generator is not required. I trust this is seen by all as an important development.

Simplification01_scope01.png is a result of the simulation run and shows the "CSR" and "Vbat" voltage wave forms. Also indicated is the MEAN voltage of each, and note that the "CSR" voltage is about -56mV.

Following this is Simplification02_schema01.png. This diagram depicts one of the simplifications I've not yet shown. What you see is the DC bias source relocated to the "CSR" leg, and the DC bias source "flipped" over such that it's negative terminal is now connected to the circuit ground. Yet another important development in the progression.

The "CSR" and "Vbat" wave forms and MEAN values with this change are virtually identical to those in the Simplification01_scope01.png scope shot.

.99

[Rosemary Ainslie]

Interesting Poynty. 

I need to confirm your drain and you need to get rid of that cap across the load.  Also.  Your waveform shape is still wrong.  But I think that's because you've placed the CSR in the wrong place.

I'll get back here. 

Kindest regards,
Rosie

BTW - why aren't you showing the waveforms across that revised schematic.  I'd be glad to see this if you'd oblige.

[Rosemary Ainslie]

Ok Poynty.  Here's the error.  You need to shift that signal battery supply to the rail in series with Q2. Then you can leave the CSR where it is.  Otherwise you need to move that CSR directly to the nagative rail of the source.

I can't get a printout so I'll probably edit here as well.

BRB
Rosie

Added.  ALSO.  You're showing the probe positioned at a NODE - YET AGAIN Poynty!  And you need to lose that CAP.  Why is it even there?  The one across the load?

Nothing wrong with the probe positions - sorry.  It's not a node.  'Me bad' as you guys say.  lol.

I love the clarity of those FET  positions.  So readable.  Thanks for that. 

Ok Poynty Point.  With those amendments I think we're good to go.  I'd prefer to see the waveform across the load - if you can oblige.  And I cannot see how that CAP can help anything at all.