Testing the TK Tar Baby

[poynt99]

If you remove the bias current by removing the other MOSFET the the main current is approx. 1,94 Amp. Insert the other MOSFET and the main current drops to 1,74 Amp.
I can't get the numbers correct even if the bias current was 113mA. 1,74 + 0,113 = 1,853 Amp. Do you see what I mean?

GL.

.99

Here is what I'm measuring.

GL.

OK, I think I see the problem.

If you are anticipating that the current through the load (your 1.74A) should increase by the amount of bias current (your 90mA) when Q2 is pulled, that would not be a correct assessment, and is evidently not what you are seeing with your measurement.

The biasing for Q1 is different in each case, i.e. when Q2 is present or absent, therefore the load current with Q2 removed can not be predicted by simply adding the bias current to the load current when Q2 is present.

Does that make sense?

[Groundloop]

OK, I think I see the problem.

If you are anticipating that the current through the load (your 1.74A) should increase by the amount of bias current (your 90mA) when Q2 is pulled, that would not be a correct assessment, and is evidently not what you are seeing with your measurement.

The biasing for Q1 is different in each case, i.e. when Q2 is present or absent, therefore the load current with Q2 removed can not be predicted by simply adding the bias current to the load current when Q2 is present.

Does that make sense?

.99,

Yes that makes sense. But that is exactly what your Spice simulation did, just adding the bias current to the main current.

Now at 90mA through the 50 Ohm resistor the voltage drop over the resistor should be 4,5 Volt. With a bias voltage
of 12 volt the gate should get 7,5 Volt. With 7,5 Volt on the gate, the MOSFET should be fully on conducting current
and also will be out of the linear area of amplification. So the only thing that should limit the overall current is the total
resistance between the 24 Volt and ground. But still the current drops to 1,74 Amp when we apply a bias current
of 90mA through the MOSFET instead of close to 2 Amp  where it should be. Do you understand the implication
of what I'm saying? We have discovered that a secondary current loop through a MOSFET in saturation will bring
the MOSFET current down even if the gate voltage is high enough to keep the MOSFET in saturation. So the bias current
running through the MOSFET is modifying the behavior of the MOSFET somehow. Is it possible that the extra bias current
loop is somehow acting upon the gate charge?

GL.

[poynt99]

.99,

Yes that makes sense. But that is exactly what your Spice simulation did, just adding the bias current to the main current.

No, I think you are confusing what I'm saying. Yes, the SPICE simulation indicates that if we add the currents as shown on the diagram, all makes sense. BUT this is only for the case when Q2 is present.

I stated two (2) distinct Q1 bias conditions, one when Q2 is present, and one when Q2 is absent. You stated that we should be able to add the two currents to produce the total load current, even when we change the biasing by removing Q2. I am trying to explain that this is NOT the case. The biasing is different in each case, therefore Q1 is NOT biased to the same current. The two conditions are not equivalent.

Let's look at your example again:

With Q2 present, you have a load current of 1.74A, and a bias current of 90mA, correct? That adds to 1.83A. If I am understanding your assertion, you expect the load current to be 1.83A when Q2 is pulled, correct?

With Q2 pulled, the actual measured load current in your case was 1.94A, not 1.83A, correct? I am saying that they should be different, because Q1's biasing is different in each case.

Now at 90mA through the 50 Ohm resistor the voltage drop over the resistor should be 4,5 Volt. With a bias voltage of 12 volt the gate should get 7,5 Volt. With 7,5 Volt on the gate, the MOSFET should be fully on conducting current and also will be out of the linear area of amplification. So the only thing that should limit the overall current is the total resistance between the 24 Volt and ground.

But still the current drops to 1,74 Amp when we apply a bias current
of 90mA through the MOSFET instead of close to 2 Amp  where it should be. Do you understand the implication
of what I'm saying? We have discovered that a secondary current loop through a MOSFET in saturation will bring
the MOSFET current down even if the gate voltage is high enough to keep the MOSFET in saturation. So the bias current
running through the MOSFET is modifying the behavior of the MOSFET somehow. Is it possible that the extra bias current
loop is somehow acting upon the gate charge?

GL.

There is nothing that strange going on, I assure you. The circuit is obeying KCL (Kirchhoff's Current Law), and if you measured the Q1 Drain current as I did in the simulation, you too will see that KCL holds true.

[TinselKoala]

Well...
My internet was down for a while this morning, but just before it went, I had prepared this comment, some of which may still apply. I couldn't post it then so I'll do it now... but please don't interrupt the current analysis. I'm going shopping anyway.
(no pun intended....)

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Yes, it's important to be clear about the measuring points and the exact circuit used. I think .99's and GL's diagrams are perfectly clear and straightforward, but apparently they need a translator on their journey South.

This is why I always am trying to put all my circuit variations onto the same basic NERD diagram as published in the papers and on the forums. I think that by doing this, the schematics probably have the best chance of being correctly interpreted by YKW.
It is easier and clearer for me, too, to work with the style of diagrams that .99 and GL use. But I'm always going to put whatever variant or different measurement locations I've used back on some schematic that...er.....  _relates to_  the NERD schematic directly. It might be helpful if GL and .99 indicated on their diagrams the points corresponding to what I'm now calling "RED" and "BLACK": the bias or gate drive input points on the Ainslie circuit. I can tell where they are but... well, you know.

Today.... finally.... I might have time to get to the component supplier. I'll be able to pick up some parts for the Altoids demonstrator circuit that .99 designed, and I also want to get a couple more PG50s..... because I intend to test at least one to deliberate destruction this afternoon. I will also ask if they have the IRFPF50 in stock.

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Carry on....

 

[TinselKoala]

Effect of some added inductance at Tar Baby's battery:

http://www.youtube.com/watch?v=pWHURC48vDo

Somebody is watching. This video had at least 9 views before I got around to posting this link, including a comment by Stefan already.

Thanks for watching ! Please comment on the videos, you lurkers.

I'm sure you understand my editorial policy by now, in the one place over which I have some control. That is.... if I don't like what you say, I'll ask you to justify your argument with checkable facts, and if you cannot... or even claim you can, but WILL not.... then you can just go play in somebody else's sandbox.

Unless of course you are particularly amusing... then we can have some fun.