Kapanadze Cousin - DALLY FREE ENERGY

[Jeg]

Itsu, did you notice if you had the same behavior when using IR2110 instead of those two drivers you are using now?

In addition, what coupling capacitor values do you use at your 24V power dc supply?

I am thinking a case that when your first mosfet stops conducting thus increasing its drain voltage (transient period), the same time a negative front appears to your +24V at the taping point in the middle of your coils. If your power supply doesn't have the "courage" to keep its output steady at 24V while the negative front is incoming to it (through the taping point), then for that short moment (grey zone) a zero voltage appears to the drain of the other mosfet and so the sudden zeroing. If this is the case, then the fact that your drain goes to zero voltage without a gate signal, doesn't necessarily means that your mosfet is open.
It would be interesting if you could place your current probe across some low Ohm resistor connected between source and ground, and watch what happens during transition.

[verpies]

I'm not sure if I agree with that explanation completely.

Thanks for your input.  I was wondering when you'd come out of lurking.  I am glad my rant has provoked you

The "grey zones" are times when both mosfets _should be off_ since the Gate signals are both low at those times.

Yes, the TL494 "tells" them to be OFF just like it is designed to.

But both MOSFETs aren't OFF.

Let's verify that with a current probe or CSR on the drain of the MOSFET.

It looks like each MOSFET is turning ON _before_ its Gate signal goes high, and this is happening exactly when the other  MOSFET's gate signal goes low and turns its MOSFET OFF.

That instant in time is also the beginning of the "gray zone", during which both MOSFETs are OFF.  But just before that, a lot of current was flowing and there was a lot of magnetic flux in the core.  As you know, an inductor "fights" any flux discontinuity by attempting to maintain the flux with a sufficient current flow ...so there must be current flow during the "gray zones" if the leakage inductance is > 0.  Do you agree?

So my question to you is:  Which way does that "maintaining" current flow?
1) Through one MOSFET (between Drain & Source or body diode).
2) Through both MOSFETs (between Drain & Source or body diode).
3) Through one snubber (e.g. TVS diode).
4) Through both snubbers (e.g. TVS diodes).
5) Through the loads on the secondary windings.
6) Combination of the above.

Current probe will tell...

[verpies]

I am thinking a case that when your first  MOSFET stops conducting thus increasing its drain voltage (transient period), the same time a negative front appears to your +24V at the taping point in the middle of your coils.

I think Itsu has scoped that +24V point in the middle of the coils and found only 0.5V peak voltage variation there.  See here and here.

[Hoppy]

I'm not sure if I agree with that explanation completely. The "grey zones" are times when both mosfets _should be off_ since the Gate signals are both low at those times. But both mosfets aren't off. It looks like each mosfet is turning On _before_ its Gate signal goes high, and this is happening exactly when the other mosfet's gate signal goes low and turns its mosfet off. There doesn't seem to be any problem with each mosfet turning off at the right time when its Gate signal goes low, the problem is the mosfet turning ON when the opposite Gate goes low. I'm not sure if the leakage inductance explanation fits this sequence of events. What am I missing here?

I agree but I see no disturbance to the gate signals suggesting that this may be caused by mosfet body diode junction breakdown. However, as Jeg suggests something could be amiss with the power supply.

[itsu]

In an ideal transformer "shorting the other primary half" should give you a 0μH reading (a 100% decrease).
In your transformer the inductance reading decreases only by 71%.

Anyway, since I would like to understand it better.  Could you post a scopeshot like the one below but with a very small duty cycle and at 5μs/div ?
The high voltage level is your snubber clamping level, e.g. the TVS diode clamping level.
When both MOSFETs are OFF the current "wants" to continue flowing due to the high leakage inductance.  Thus a high voltage is developed across that winding in an attempt to continue this current flow until the magnetic energy stored in the core/leakage inductance is exhausted.  The easiest path for the current is to continue its flow by starting flowing through the TVS diode.  If that diode had not provided the path for that current, then the Drain-Source junction HV breakdown would be the next best path.

When the 2^nd MOSFET turns ON then an easier current path for the current is established and the voltage can fall. However it cannot fall lower than the 48V level because the 1:1 autotransformer action, caused by the current driven by the 2^nd MOSFET, adds the auto-induced 12V to the +12V from the power supply and you get the normal 2*V_CC or 48V level.
Take a look at the scopeshot attached below.  I have marked the times when both MOSFETs are OFF in a gray color. Let's call them "gray zones"
If the leakage inductance was 0μH then it would store no energy and the drain voltage could fall to 0V during the entire "gray zones" and the drain voltage would appear to follow the inverse of the gate voltage ...just like you'd expect.

But the leakage inductance in your transformer is huge and it stores a lot of energy. This energy "fills up" the "gray zones" creating an illusion that the drain voltage leads the gate signal ...which by principles of relativity is the same as: the gate signal lagging the drain voltage.

If you decrease the duty cycle a lot, then less energy will be stored in the leakage inductance.  Less energy will last for a shorter time, so as you shorten the gate pulse widths there will be a point where this energy becomes entirely exhausted/dissipated by your TVS diodes ...and then the voltage in the "gray zones" will fall down to zero (albeit not from the beginning of the "gray zones" because the stored energy needs time to be dissipated).  BTW: Loading the secondary windings helps to exhaust this stored energy even faster.

All of this would be easier to see if the current flowing in the windings and TVS diodes was visualized also ...because inductors are current devices and only current matters to them.  Voltage is just a shadow for inductors, albeit it matters for diode and MOSFET junctions.

P.S.
My lossless clamps decrease the effective leakage inductance and turn it around in order to make a friend out of the enemy.

Thanks verpies,

its a great explaination which to me sounds very logical.
I will try to build up again the snubber / TVS setup like it was on that screenshot and decrease the duty cycle while also taking some current measurements.


Itsu