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Overunity Machines Forum



TK device, TPU.. Only enter if you seek truth. Cause here it is...

Started by elementSix, December 14, 2012, 07:26:31 PM

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0 Members and 4 Guests are viewing this topic.

elementSix


verpies

Quote from: elementSix on January 31, 2013, 12:06:14 PM
I not totally sure, but I think it needs to range between 6.50Hz to about 40 Hz.. But I am still not sure.   Can they be adjustable and still be self adjusting??  Square wave and yes Phase detector.  This is one idea from this russian site, but I don't understand it..
next post will paste pic
Do they Sell these somewhere, that are for TV and adjustable??
The cheapest PLL is the CD4046 integrated circuit and here is an application note how it works and how it can be used.  They sell them everywhere for less than a can of beer.

Every PLL has a current or voltage controlled oscillator (CCO or VCO) and a phase detector (PD).
The VCO is just an adjustable oscillator (in the CD4046 it can go up from 1Hz to 1.4MHz). The key word here is "adjustable" and it does not mean "adjustable" by an RC constant that is controlled by a potentiometer with a knob, as in most adjustable oscillators.  In case of the VCO, it is the voltage that controls the frequency. You can view it as a voltage to frequency converter.

Normally this controlling voltage input to the VCO is provided by the output of the phase comparator or phase detector (PD).  One of the PD's inputs (it has two of them) is YOUR input, and the output of the VCO is YOUR output.

There is also a feedback loop between the VCO output and the other PD input, in order for the PD to constantly adjust the frequency of the VCO to keep a constant phase offset. Often frequency dividers (e.g. counters) are inserted in this loop. This causes the PLL to "undivide" or multiply YOUR input frequency (one of its main functions). In other words the output of the VCO is some integer multiple of YOUR input frequency to the PD. The frequency and phase relationship between YOUR input and output is kept constant by the feedback loop between the PD and VCO. 
I omit the loop integrator (low pas filter) from this description for simplicity.

The schematic from your russian friend contains the 4046 PLL and in its feedback loop are some 40193 binary counters/dividers and 4066 bilateral analog switches to change to a different low pass filter when the PLL locks onto the input frequency (most PLL designs do not perform such loop filter switching).

segar

hi, verpies

your question:
1).Is B1 connected to B2?
What field are the two 220t receiving coils immersed in?
answer:
the reason i am turning the coil winding in to the L2,cw,ccw for the generate HV voltage for testing as first experiments.

your question
2.) DCV: 68.4V
In the capacitor i measure ,its stop raising until this value.
answer:
the voltage i have mentioned to you the dcv voltage, its from the D1,in my circuits as i have post to you last weeks, that means the output from the D1,I only get that much of voltage,maximum ,i want to generate high voltage and the current from D1, output .

so all your question i have answer to you ready , if have any question please reply.

and also i have asking to you , i want to generate high voltage and high current from the L1,after the D1 .
can you give some info to do this parameter ?

thank you.


 

verpies

Quote from: segar on February 02, 2013, 09:04:26 AM
so all your question i have answer to you ready , if have any question please reply.
Unfortunately not all questions are answered. For example:

Quote from: segar on February 02, 2013, 09:04:26 AM
1) Is B1 connected to B2?
Answer: the reason i am turning the coil winding in to the L2,cw,ccw for the generate HV voltage for testing as first experiments.
...and I still do not know if B1 is connected to B2.

roll

Quote from: elementSix on January 29, 2013, 03:57:40 PM
Sorry, but these need translated also...  Thanks to who ever helps.

are you still need translate ??