another small breakthrough on our NERD technology.

[picowatt]

TK,

I see in the first paper that 6 batteries are indicated so with Vbatt at 72 volts and Q1 fully on, it would disipate closer to 58 watts via ca. 5.4 amps flowing.

Even 40 watts would require a decent heat sink, however, the positive portion of the duty cycle in the scope shots looks to be between 5-10%, so likely an IRFPF50 could survive this level of thermal dissipation for some time, as it could cool off for remaining 90-95% of the total cycle time.  Possibly the 5.4 amps was a bit close to the abs. max of 6.1 amps...

I am wondering if Q1 was inadvertantly diconnected during "Test 1".

PW

[Rosemary Ainslie]

TK,

I see in the first paper that 6 batteries are indicated so with Vbatt at 72 volts and Q1 fully on, it would disipate closer to 58 watts via ca. 5.4 amps flowing.

Even 40 watts would require a decent heat sink, however, the positive portion of the duty cycle in the scope shots looks to be between 5-10%, so likely an IRFPF50 could survive this level of thermal dissipation for some time, as it could cool off for remaining 90-95% of the total cycle time.  Possibly the 5.4 amps was a bit close to the abs. max of 6.1 amps...

I am wondering if Q1 was inadvertantly diconnected during "Test 1".

PW

If you are only referring to Test 1 then why should you assume that any current was passed via Q1?  In which case why should the transistor get unduly hot?

Rosemary

[picowatt]

Rosemary,

Are you stating that the schematic in the first paper is correct AND the scope shot "FIG 3" also correctly represents that schematic's operation?

If so, there was a problem with the Q1 or its connections during "Test 1".  Either Q1 was not functioning, i.e., it was internally open, or there was a bad connection to Q1 on the breadboard.  There can be no other explanation.

Surely you must see that if +12.5 volts is applied to the gate of Q1 it would/must turn on if the schematic is correct.

Again, Q1 had to have been defective or a connection to it was not indeed connected.  If the schematic is correct, I see no other option.

Electronically, what is your explanation?

PW

[fuzzytomcat]

Rosemary has "DUPED" us again experimentalist, members and guests,


All the papers that were sent out to accredited journals or magazines for possible peer review and publication by the NERD RAT team have two different device schematics ....

Experimental Evidence of a Breach of Unity on Switched Circuit Apparatus   ( ROSSI-JOP-1-PDF.pdf )
ROSSI-JOP-1-PDF_Q2_x4_Q1_.PNG

Proposed variation to Faraday’s Lines of Force to include a magnetic dipole in its structure   ( ROSSI-JOP-2- PDF.pdf )
ROSSI-JOP-2-PDF_Q1_Q2_x4_.PNG


As you can see Q1 / Q2 x4 is flip flopped or reversed in ROSSI-JOP-1-PDF_Q2_x4_Q1_.PNG .... and .... ROSSI-JOP-2-PDF_Q1_Q2_x4_.PNG   


Rosemary explain this if you possibly can ..... there are to many of your unchecked device diagrams floating around and you haven't tied even one to any kind of a complete forum posted test package just lumps of crap !!

You know the drill always bloviating on all the engineers and academics that has seen your proposed failed devices whats required for consideration of a "CLAIM" .... WTF is your problem !!! 


When can we expect the required testing from you that Stefan requested we've been waiting days now !!  Did you not read Stefan's postings


Cheers,
FTC

[Rosemary Ainslie]

Rosemary,

Are you stating that the schematic in the first paper is correct AND the scope shot "FIG 3" also correctly represents that schematic's operation?

If so, there was a problem with the Q1 or its connections during "Test 1".  Either Q1 was not functioning, i.e., it was internally open, or there was a bad connection to Q1 on the breadboard.  There can be no other explanation.

Surely you must see that if +12.5 volts is applied to the gate of Q1 it would/must turn on if the schematic is correct.

Again, Q1 had to have been defective or a connection to it was not indeed connected.  If the schematic is correct, I see no other option.

Electronically, what is your explanation?

PW

Picowatt

I was given to understand that the offset of the function generator comprises a potentiometer that can be applied to resist the current flow from the battery supply.  It is applicable to all the function generators that we used and we tested this on 2 different types and on a total of 6 different function generators during the two years that this circuit has been researched.

What I KNOW is that this is able to determine the rate at which the energy from the battery supply source is applied.  But whatever manages this, the fact is that we can entirely restrict the flow of current or vary this as required with that offset.  I leave that to the experts to determine.  What should be of interest is that there is INDEED no current flow during the 'on' period of the duty cycle.  There is nothing 'impaired' in the transistor.  If you look at test 2, 3 and 4 - they all behave as required during the 'on' period. 

And of interest and why these papers were written - is the fact that there is any path at all to allow the oscillation.  What's begged is an explanation for the positive half of each half of that oscillation.  If this is coming from the battery supply then how does it flow through Q1 or Q2?  This is precisely the point of discussion that we arrived at with Poynty - when TK  then usurped this thread with his rather pretentious claim of a replication let alone a debunk.

Rosemary

added
And may I add - that this is also precisely why he needed to 'avoid' all reference to our papers.  I'm only sorry that he managed to distract everyone for as long as he did with those absurd analyses related to the 'function' of the 'mosfet' as he terms it.