Rosemary Ainslie Circuit Demonstration, June 1 2013

[picowatt]

And yet, there is no end...

Dear picowat,

It seems that you are proposing that our IRFPG50's have degraded to the point that they cannot pass any current coming from the battery supply source.  Your evidence is based on the fact that the applied signal from the function generator is at 12 volts.  Which under all other circumstances should then enable the flow of current from the battery supply.  Yet we clearly do not have the flow of current during this 'on' period of the duty cycle - coming from that supply.  Therefore do you propose that our MOSFETS's are no longer functional.

At least, it seems, she is now acknowledging as "fact" that the FIG3 scope shot does indeed show +12volts being applied to the gate of Q1 during the positive portion of the FG cycle.  As she has denied this many times, it is refreshing to finally see this admission. 

She also, apparently, agrees that applying +12 volts to the gate of Q1 should cause Q1 to pass current.

As well, she agrees that there is no current flow observed by the CSR during the application of the +12 volts to the gate of Q1.

So, to rephrase, she has _fiinally_ admitted that with regard to FIG3, during the portion of the FG cycle wherein the FG output is a positive voltage, +12 volts is being applied to the gate of Q1.  As well, she agrees, as would most everyone, that +12 volts applied to the gate of Q1 should turn Q1 fully on, and yet, during that same portion of the cycle, no current flow is observed at the CSR trace, which can only mean that Q1 is not turning on.

As I have stated many, many times, there are only three possible explanations for Q1 not turning on when it should in FIG3.  During the FIG3 tests, Q1 was either defective, disconnected, or not connected as per the schematic.

Although TK has made a very good case towards Q1 being defective (as in damaged) during the FIG3 test, based soley on what can be gleaned from looking at FIG3, it cannot be known for certain which of the three possible explanations for Q1 not turning on is the correct explanation.  However, it is for certain, that during the FIG3 test, Q1 was either defective, disconnected, or not connected as per the schematic.

If she (or her "team") has another possible explanation as to why Q1 is not turning on as it should in FIG3, she should state her case.  But for now, she at least admits that there is indeed +12volts being applied to the Q1 gate and that Q1 should be turning on and that it is not.

So, great news, she is finally in agreement that there is something amiss with Q1 in FIG3!!

Unfortunately, there is more...

The question that we suggest you should be asking yourself is HOW it is possible for those transistors to pass any current at ALL - IF, as you propose - those MOSFETs have been so degraded?  Because, self-evidently - there is a great deal of current passing both to and from that battery during the 'off' period of that switching cycle.  We would be MOST intrigued to see your answer to this.  If you take the trouble to explain it then that would be considered appropriate as we are now going to some CONSIDERABLE lengths to show you that indeed we DO what you claim is IMPOSSIBLE.

Q1 is NOT passing current in FIG3 when +12 volts is applied to its gate because Q1 was either defective, disconnected, or not connected as per the schematic during the FIG3 test.  There are no other possible explanations.   FIG5, which does show current flow during that similar portion of the cycle, depicts the correct waveform as one would expect from looking at the schematic in the first paper.

The fact that there IS current flow observed during the portion of the cycle when Q1 is turned OFF and Q2 is turned ON is totally unremarkable.  Would not she, or any one else, expect that there would be current flow observed during the time when Q2 is turned on?   Why would there not be?  Q1 is a minor player during the portion of the cycle when Q2 is turned on (i.e., during the oscillations). 

When the FG output is a negative voltage, Q2 is biased on and Q2 oscillates.  DC current flows thru Q2, the FG, and to the CSR or battery negative (dependent upon where the FG signal common is connected).  AC current during the Q2 oscillations flows primarily thru the intrinsic MOSFET capacitances to the CSR.

There is no mystery here.  It has all been explained many, many times, to those who actually listen and learn. 

She apparently thinks that the oscillations are strictly ringdown from Q1 turning off and the inductance at the drains discharging.  This is not the case.  She apparently does not recognize that there are TWO simple circuits contained in her schematic.  The first is Q1 which is being used as a simple switch.  The second is the Q2 portion of the circuit which is configured as an oscillator.

And of course, as she believes herself qualified to even discuss electronics, she adds a little condescending tripe that only further demonstrates that she, and whatever team is behind her, have no skills whatsoever in the field of electronics.

Meanwhile we would also like to thank you for your contribution to the cause.  You have set us a remarkably easy test to disprove your rather noisy dismissal of our evidence - and we trust that you'll 'enjoy the show' - so to speak.  Please understand that this demonstration is ONLY for your benefit.  And we trust that once you've seen the evidence that you will then be silent on this matter.  But I am well used to disappointment in such things - and rather expect that you'll probably need to do a lot of hand waving - as is your wont - in order to trivialise our results.  I, in turn, look forward to the entertainment THAT will offer.

Kindest regards
Rosie Pose

The fact that Q2 oscillates normally in FIG3 is in no way a "test" with regard to Q1 that proves anything about Q1. 

Q1 is not turning on in FIG3 because Q1 was either defective, disconnected, or not-connected as per the schematic during the FIG3 test.  There are no other possible explanations.

FIG3 should look similar to FIG5 with regard to the CSR trace depicting current flow when the gate of Q1 is made positive.   


However, from the above paragraph, it looks as though she continues to state that she will indeed duplicate FIG3 with a properly functioning Q1 connected as per her schematic that demonstrates no current flow when +12volts is applied to the Q1 gate.

As this cannot be done, she apparently is promising to commit deception and/or trickery...


PW

[TinselKoala]

After reading her recent posts, it is obvious that continued attempts to discuss anything with her regarding electronics would be fruitless, and a complete waste of time.  She continues to demonstrate her unwillingness, or inability, to learn and actually understand her circuit's operation.     

As she claims that she is supported by a team of intelligent people, she should be required to present at least one person, sufficiently skilled in electronics, that is willing to support her assertions and engage in dialog regarding the electronic operation of her circuit.

If her "team" actually believes that +12volts to the gate of Q1 will not cause Q1 to pass current, or that a negative voltage applied from the FG to the source terminal of Q2 will not bias Q2 partially on into a linear region of operation, or that the Q2 DC bias current cannot flow thru the FG, or that the AC currents of the Q2 oscillations cannot flow thru the intrinsic capacitances of all 5 MOSFETS's, then the onus should be upon her to present at least one knowledgable person that supports those beliefs and is willing to engage in dialog.

Until she can find even that one supporter, sufficiently skilled in electronics and willing to discuss her circuit, I have to agree with MH, this just needs to end...   

PW 

Yes, it needs to end. That is why this Figure 3 scopeshot is so important. She's strung it out for over two years now, ever since promising to perform tests after the March 2011 demonstration and the questions it raised. She's missed the June 1 announced demonstration, and she's given an utterly bogus excuse for missing it. She will miss the demonstration she has scheduled to occur in five days, too, I predict. If she does manage somehow to show something on Saturday, it won't be what we've been asking for, and it won't be a repeat of Figure 3, "bringing water to boil" as claimed in the paper.


How does Ainslie intend to demonstrate that all the mosfets are "in tact" before and after the making of the Figure 3 scopeshot while bringing water to boil? This is an important question. She's supposed to be doing this demonstration live, right? Am I going to wait around while she unbolts and unsolders a bunch of mosfets, somehow proves that they are OK, then solders them back up? Does she think the "transistor check" function on her DMM is going to test an IRFPG50 mosfet?


On the issue of the qualifications of the people who might be working with Ainslie: two of her alleged co-authors are supposed to be engineers of some kind. Donovan Martin and Alan Macey. But nobody has ever heard from either of these people. FuzzyTomCat has tried to contact Donovan Martin several times and I don't think he has ever gotten an answer. 

[TinselKoala]

@PW: yes, it is remarkable that she still repeats the same errors.

As I've said before, she thinks that mosfets can only be ON with zero resistance (she ignores the Rdss) or OFF with infinite resistance. She does not grasp the linear operation response region of a mosfet at all. Thus she does not understand that the Q2 oscillations _are_ indeed turning Q2 slightly on and slightly off at the oscillation frequency, hence passing a small amount of power to the load, as well as dissipating some power internally. (Actually since it is impossible to balance the parallel mosfets in Ainslie's circuit, only one of the Q2s will be carrying most of the oscillation current, and so only this one Q2 will generally get warm during oscillations, but even this current is small so the Q2s are never in danger.)

[picowatt]

@PW: yes, it is remarkable that she still repeats the same errors.

As I've said before, she thinks that mosfets can only be ON with zero resistance (she ignores the Rdss) or OFF with infinite resistance. She does not grasp the linear operation response region of a mosfet at all. Thus she does not understand that the Q2 oscillations _are_ indeed turning Q2 slightly on and slightly off at the oscillation frequency, hence passing a small amount of power to the load, as well as dissipating some power internally. (Actually since it is impossible to balance the parallel mosfets in Ainslie's circuit, only one of the Q2s will be carrying most of the oscillation current, and so only this one Q2 will generally get warm during oscillations, but even this current is small so the Q2s are never in danger.)

TK,

She "thinks" a lot of things.  But that does not make them true...

PW

[picowatt]

TK,

Didn't you do a video in the past where only Q2 was installed and oscillating (i.e., with Q1 pulled)?

PW