Graham Gunderson's Energy conference presentation Most impressive and mysterious

[Spokane1]

Thanks Spokane1 for the diagram, I can appreciate how much work that is. That's all well and good, but I'm having trouble believing that the circuit you've drawn out could provide enough current for the driver chips to switch into the Gate capacitances of the mosfets at 50 kHz. Where does the input power come from for this circuit? Is it coming from the breadboard?

Dear TK,

From my circuit tracing there is a higher voltage source (20V to 32V?) that comes from the upper left hand corner of the logic breadboard and is supplied to both shielded ribbon cables that go to the synchronous diode and the H-Bridge. If the pin designations are the same from one end of the cable to the other then you can see this higher voltage come in on one of the upper lines. I just show it as providing +20V.

The proposed voltages may be way low if it takes 25V typically to trigger those CREE mosfet's. Graham likes to over drive his devices by 20% so he would need a regulated 30 volt supply for his isolated power supplies. I suppose this over driven condition would add to  the Miller capacitance loss discussion.

As far as how much power it takes - we shall know soon enough as I build one of these.

How important is the isolation issue for this kind of circuit if we just use a series of 9 Volt batteries? Surly these would last long enough to get a decent measure of the energy need to switch the mosfet's.

How would you propose that we measure the power output of a battery operated system tapped at three different voltage locations? I don't suppose there is an easy way to do this. We would probably need three current measurements and three voltage measurements.

Having one voltage and running it through a series of regulators would probably increase our losses.

Any ideas?

Spokane1

[TinselKoala]

We can talk about battery power measurments later. At the moment I have a few questions about your last schematic.

The unidentified mosfet driven by the IXDD614 driver.... is that the small TO-92 object in the center near the driver chip? This one does seem to be given a 20 volt gate signal at however many amps the +20V supply and the driver can supply. What is the part number of this tiny mosfet? Or is the unidentified mosfet some other part hidden under the circuit board? If so what is that TO-92 device?

The drivers shown connected to the Gates of the actual Synch Rectifier mosfets on the right side of the diagram... what is going on there? Are these parts hidden away? In any case it seems to me that they can only supply +12V max to the Gates....  and I have my doubts about the current that is available here. Also there is something funny about the diodes between Gate and Source for these mosfets. It looks to me like a +voltage gate signal is connected directly to ground "common" and mosfet Sources through two series diodes, one of which is a zener, but both are forward biased. How does this arrangement actually drive the Gates with sufficient voltage for a hard turn-on?

[Spokane1]

We can talk about battery power measurments later. At the moment I have a few questions about your last schematic.

The unidentified mosfet driven by the IXDD614 driver.... is that the small TO-92 object in the center near the driver chip? This one does seem to be given a 20 volt gate signal at however many amps the +20V supply and the driver can supply. What is the part number of this tiny mosfet? Or is the unidentified mosfet some other part hidden under the circuit board? If so what is that TO-92 device?

The drivers shown connected to the Gates of the actual Synch Rectifier mosfets on the right side of the diagram... what is going on there? Are these parts hidden away? In any case it seems to me that they can only supply +12V max to the Gates....  and I have my doubts about the current that is available here. Also there is something funny about the diodes between Gate and Source for these mosfets. It looks to me like a +voltage gate signal is connected directly to ground "common" and mosfet Sources through two series diodes, one of which is a zener, but both are forward biased. How does this arrangement actually drive the Gates with sufficient voltage for a hard turn-on?

Dear TK

You are certainly on the Ball this morning. You are bringing up the same issues that are still puzzling me as we speak. Just how does that little solid state device supply enough current to operate 6 regulators and drive two large power MOSFET's.  The problem is that that little TO-92 device is the only component with in range of the IXDD614 driver and it doesn't even have a heat sink. There has to be a suitable switch some where that is most likely being operated by that driver, so I just showed a MOSFET since that is what that driver is designed to support. I suspect that Graham didn't need the horsepower of that driver, but happened to have several on hand. I don't have a part number for that TO-92 device. I figure we will just use what we have on hand or what we can afford.

That network of Zener diodes, diodes,  and capacitors is Graham's method to eliminate the gate resistor.  I probably have them connected improperly. These are the six surface mount components soldered directly to the MOSFET body.  These components are supposed to be two snubber networks. One clips the ON voltage while the other clips the negative bias. Graham says that in high speed applications just the  parasitic inductance from the short leads of a component will cause voltage overshoot. I could have screwed up the polarity when I was mirroring the components when drafting. Graham said that the diode is to back up the Zener and take some stress off of it. I'm not really sure which diode goes where, nor am I certain about the capacitor connection. I plan to check out references on gate snubber circuits and see if I can get some guidance. My intent here was to show that these kinds of components are installed at that location.

The drivers for the main MOSFETS are hidden.  You will notice the 5 each blue header connectors at the top of the MOSFET. The MOSFET is mounted to a tiny circuit board that plugs into these header pins. Graham says he has a high speed driver mounted on this circuit board. I suppose another IXDD614 along with the needed storage capacitors to supply that 16 Amp turn on pulse. I wouldn't doubt that all the components on that mini circuit board are of the surface mount variety.

Also I'm sure that +12 volts needs to be something higher since those SiC MOSFET's typically need +25 gate voltage plus what ever over drive pulse people want to use. I'm now thinking that he must have had +32 volts available as his high rail. The IXDD614 will take +40.  The conductor that caries the high rail voltage to the synchronous diode is just another wire in that ribbon cable, so I suppose it is about $#24 AWG.

I don't have the experience to know how much current would be needed to run all this stuff on that circuit board, but I'm pretty sure that at +32V the current would not be a problem, maybe 200 mA?

Feel free to bleed (make red-line changes) all over that drawing.  ION has already pointed out some other improvements that are needed as well.

Spokane1

[Vortex1]

I can understand why Graham did the power supply section the way he did. He was literally backed into a corner, trying to get high isolation between sections and good regulation on a budget. The leakage inductance of the multiple windings spread out as they are on a toroidal core for the required HV isolation, would not provide good regulation if it was a typical pwm switchmode design, so he was forced to use the linear regulators.

I would have opted for two separate transformers for HV isolation with a switchmode driver chip on each. Then he could have tightly coupled the windings of the three supplies on each transformer for good regulation via optical feedback from the highest loaded winding and not have needed the wasteful linear regulators.

Alternately, there are folks that make multiple output (small brick encapsulated) power supplies that have very high isolation to the input and are a good fit for this type of H bridge design.

But when you are on a tight budget, discrete is the way to go, as Graham did.

[Spokane1]

I can understand why Graham did the power supply section the way he did. He was literally backed into a corner, trying to get high isolation between sections and good regulation on a budget. The leakage inductance of the multiple windings spread out as they are on a toroidal core for the required HV isolation, would not provide good regulation if it was a typical pwm switchmode design, so he was forced to use the linear regulators.

I would have opted for two separate transformers for HV isolation with a switchmode driver chip on each. Then he could have tightly coupled the windings of the three supplies on each transformer for good regulation via optical feedback from the highest loaded winding and not have needed the wasteful linear regulators.

Alternately, there are folks that make multiple output (small brick encapsulated) power supplies that have very high isolation to the input and are a good fit for this type of H bridge design.

But when you are on a tight budget, discrete is the way to go, as Graham did.

Dear Vortex,

Your proposal is based upon good electronic engineering practice. For this system there is another issue that seems to be present. If you notice the master clock for both the Synchronous Diode and the H-Bridge is located back on the logic board. It is U3 which is 1/2 of a TS556 Dual CMOS timer.

In the performance evaluation of this circuit it has been pointed out by Graham that sometimes the operational frequency, or one of its harmonics, grossly interferes with his power measurement instrumentation.  If there were 6 PWM's utilized in the over all circuit (2 for the backend diode and 4 for the H-Bridge) I think it would be extremely difficult to determine which one was causing problems during an interference event. With a master clock architecture a simple adjustment to a micro trim pot would shift the frequency of all the power supplies. I doubt that such a frequency change would impact the operation of the power output, but it would require a topology that depended upon a central clock signal.

Anyway this is my interpenetration of what is going on between the components on the logic board and what isn't on the backend diode system.

However, with the advantage of this global control comes the loss of efficiency. I'm not even sure if he is using TO-92 linear regulators. He is using something that is in a TO-92 case. Can you even make a usable regulator with one transistor?

If there wasn't a sensitivity issue with the evaluation equipment I would do it just like you say.

Spokane1