A Half Baked Idea Re-Envisioned

[D.R.Jackson]

A Half Baked Idea Re-Envisioned
D.R. Jackson

  This is an Open Source contribution if anyone of you find that it has some merit and want to use or expand on the idea.  I can not predict what I might or might not come to do with my circuits here, but I can now see the potential of them, I had some doubts years back but I have changed my mind recently, and I hope that you can see why I have had a change of mind and have revisited these concepts.

  Please note that the performance of the circuits seen in this document is relative to the transistor (2N5550) used in the circuit simulation model which means that in using other transistors the circuit must be redesigned for that transistor chosen.  Also we will assume that the signal source for the transistor consumes power in the micro-watt range, or that we can borrow power from the circuit sometime later on in the future to create a self oscillation loop back to the base of our transistor and hence make use of a small amount of power the circuit provides in the output section.

  A data sheet for our transistor can be downloaded here: https://www.nxp.com/docs/en/data-sheet/2N5550_5551.pdf

  I had a leap forwards while attempting to document the flaws of my circuit concepts to discourage people from making my mistakes, and so I set out to unveil what I was doing wrong in my original circuits from April 2009, but this lead me to experiment with curious insights I was developing in hopes of exhausting everything to disprove the circuits.  Instead of dis-validating the circuits, I was able to utilize new insights and followed them until I had a remarkable result.  I was watching the instantaneous power of the output and its period or duration of wave cycle as compared to input power to try and disprove the idea of the circuits not working towards reaching over unity since the period of the output waveform would most likely average out to result in power less than unity at output.  But then I discovered that with respect to sine wave power at the input and output I had managed to make the circuit work as I originally intended but failed to do back in the half baked ideas section of Overunity.com.  Anyways lets look at what I was able to do in re-evaluating these circuits.

Please refer to the pictures below this text, and you can download these files along with the LTSpice simulations in the links below (see New Findings.zip).

  In figure 1 below we have an LTSpice circuit where I am comparing the input power of a battery or power supply source V1 (green waveform) with the power being stored in C2 (red waveform).  The positive amplitude power peak of V1 is that of a 1 kHz sinewave signal on the base of Q1, and the energy at the output of C1 is that of resonance or ringing in the output circuit on the order of frequencies +/- 7.9 kHz.    For those interested the transistor is biased into complete cutoff and has no bias voltage on the base, we do not want it drawing any current between wave cycle peaks.  Now lets look at figure 2.

  In figure 2 we see the basic circuit concept where we do not have D1 and C1 in the circuit to show how it performs without these two items.  Here in this demonstration we see how the software has analyzed this circuit, where we have pure sine waves for the input power and output power.  Here we see that the two wave forms are 180 degrees out of phase, furthermore we see that their wave form functions in terms of period are the same and hence identical, what is not identical is the amplitude of the output wave form (red wave train) which increases as it travels in time until the 1 kHz input signal stokes the circuit again.

  By adding D1 and C1 to the circuit such as we see in figure 1 we have removed the circulating AC current of L1 from the power supply, this reduces the power or rather AC energy through V1, and yet we see we still have the same output power amplitude across C2.  D1 blocks reverse current flow through our power supply while C1 directs the AC current path to ground.  Now compare the output of figure 2 with figure 1 to see what I am showing you here.

  Visually we can see something remarkable and extraordinary in these circuit simulations.  The thing now is to take this concept forwards and apply this output power to a load such as a resistor (R1) and see if we can still retain this scenario. 

  In figure 3 it appears that after losses we still might be realizing the scenario we desire.  For approximately 502 µs (micro-second) out of a 1 ms signal we have our red waveform above the green waveform via two positive power peaks, now notice I measured that above the green waveform not below where the red waveform peaks begin. If I add the beginning of the two peaks in the output wave cycle then they cover ~ 869 µs out of a 1 ms signal input.

  Something else you might want to notice is the instantaneous peak power on the collector of the transistor Q1 which I have added to the plot as the lavender colored waveform.  As you can see it does not appear that the power in the transistor in anyway seems to account for the output power of this circuit, seeing that the power of a transistor determines the power of the output in ordinary concepts.  Furthermore you can see that for the period or duration of the transistor power wave cycle it is of the smallest of duration of any signal in this circuit. 

  Now the thing to do is to have people get on this and try to see what they can do with it.  In translating this to high powered transistors allot of math has to be worked out to backwards engineer this, and I would have to delve into that myself to better understand my own circuit.  And we have to get it to resonate with a feedback circuit to the base of the transistor so that the circuit oscillates without the need of an external signal source and its power requirement.

  If anyone can ever do something with this idea, we can add this to wind and solar power and make them more affordable, that is if.  Time will tell, and remember I thought that my original half baked idea in the end was sort of foolish and stupid because I was using concepts from Tesla tech forums instead of remembering what I learned in school about instantaneous power versus the period of a waveform which can deceive us visually.  Here recently I set out to see if there was a way to tackle the problem of the wave cycle period and so this seems to have been productive. 

  Nine years ago I started these circuits to try and realize and idea I had, I returned to them recently to uncover the flaws of the concepts and to demonstrate why they were flawed but I only ended up discovering something. 

  A PDF version that is more helpful is in the files New Findings.zip below.

Dannie R Jackson

[D.R.Jackson]

I must add that with the components of this circuit, I have found that the best signal input into this circuit that makes it perform the best both in terms of output and apparent period of the wave forms is to replace the 1 kHz signal with 500 Hz such as you can see in the example below.  You can try signal input frequencies of 250 and 125 Hz also but after 250 Hz you can suspect performance will be subject to the period of the high output peak. 

In figures 1 and 2 you can see that the output wave train is building up in amplitude as it progresses along going somewhere, so if it can reach where it is going and then collapse back down and start over again then this appears to be better.  Hence I have allowed that to occur by lowering the signal input frequency.

Well the more minds the better so I suppose this will have to go on as it is awhile until some other sort of breakthrough can occur.  I will come back to this again with a fresh mind later on.  Maybe somebody with allot of advanced engineering skill that knows what to do will look at this, I believe what I would want to do is to examine the phase angle relationship of the reactances and consider that the output load has to be properly phased to deliver the output into rectifying diodes as a load. Of course we have to reach a level of power output that can overcome the bias barrier of our diodes.

[D.R.Jackson]

60 second analysis discovery!

Sometimes I think my circuit simulations fail at some point then something new is discovered that brings me back into the game.

Its always good to run a 60 second simulation on experimental energy circuits in LTSpice to look for things such as charge up phenomena that occurs over time, which is the case with 1 Henry inductance in these circuits as well as the 1 Farad capacitor in the final version, all of which take up to 6 seconds of delayed time response to fully charge.  At which point in the 60 second simulation another harmonic resonance begins to occur in the circuit of a frequency of about 7.6 Hz after about 6.4 seconds of circuit simulation time.  I have also come to believe another harmonic of 0.142 Hz exist in the circuit also.  I have 4 snaps shots below for this discussion of these analysis.

In running such a simulation on the final version of the circuit which is the generator itself, the introduction of the primary L3 in series with the secondary L2 produces an induced voltage that is not of the same phase as that of C2 in the previous concept circuits.  This voltage affects all of the inductors in the circuit as well as the resonance thus introducing a third resonance in the circuit where we have the 1 kHz signal input, a secondary signal resonance of around 7.6 to 7.9 lHz and the third that occurs about 6.5 seconds after start up which is the 7.6 Hz signal, and appears to be a sub-harmonic of the 7.6 to 7.9 kHz range signal.

The result of this latter signal is that it places a higher voltage across C1 and charges it up to a level of 22.6V DC with a little ripple current, this raises the apparent power supply input voltage at the junction or nodes of D1 and C1 in the circuit that I have identified as TP_1 for test point 1.  This in effect creates a new power supply level that increases the power input into the circuit, which is power the circuit induces into itself.  The measured power input from our 12V DC supply then drops down into the 300 micro-watt range where it appears that this power level is that which is only required to supply losses back to the circuit. 

As you will see with the software analysis an extreme amount of over unity performance is demonstrated with this circuit behaving this way in these simulations, from 380 micro-watts of power input after the circuit is charged to the 1 watt range of output into the load.  And we are talking about over a good period of duration over a wave cycle too as opposed to high level spike type wave forms of instantaneous power which could be of little use if that were the case but this is not the case here as you will see.

In the plot seen with this comment figure4.png represents the plotted voltage performance of TP_1 after 6.4 seconds of simulated time, the sampling is delayed by 5 seconds before the plot begins hence the the wave forms begin on the plot at 1.4 seconds into the graph.  The plot type is a transient response plot with the initial operating point skipped because of initial start up transient responses in the kilo volt range which slow down and even crash the simulation, also if it runs it will try and find a plot scenario for the initial circuit operating point after searching through unusual and sometimes unrelated plot parameters which can take all day just to find the right plot solution, in which case it output error plots.  So skip the initial operating point solution and we select 5 seconds into the simulation to skip the left over transients which auto place the plots in the kilo volt range.  So with the right parameters set to run a simulation that corroborates with our two previous concept circuits, we can plot the circuit in its actual operation relative to the performance of the concept circuits.

Now our plot shows that the power supply voltage (green plot) is initially 12V DC minus the voltage across D1 at the junction or nodes of D1 and C1 which is our test point 1 (TP_1).  Then when the 7.6 Hz  oscillation begins as we see occurring at around 6.4 seconds (1.4 seconds on the 5 second delayed plot graph) which when it starts up has high level sine wave peaks then levels off after it has placed a charge on C1 with a resultant voltage drop across C1 of 22.6V DC which remains for the entirety of our 60 second simulation and hence becomes our new power supply input voltage at TP_1.  As you can see in the red plot the power supply V1 has charged the circuit up and has already begun and is dropping by the time of 5 seconds of circuit run time, hence is seen already dropping down to the zero axis by 1.4 seconds on this graph.

Now we want to look at the power supply V1 after C1 is charged up to 22.6V DC since our input source power from V1 is no longer required to power the circuit and now only seems to be supply leakage power losses back to the circuit. See figure5.png below. Our simulation of this will begin around 7 seconds into the start up time of the circuit so as to remove the initial power supply charge up level power which is high from the plot so we can narrow down on the micro-watt range of view, hence the simulation begins where the 7.6 Hz oscillation has already started and we will run this simulation for at least 20 seconds after that to see what happens, which indicates the circuit appears to become stable and operating with this scenario.  And we can now see that the DC power input level that we have acquired of 22.6V DC via induced charge on C1 results in 380 micro-watts of power being output from V1.

Now this means that the power level at TP_1 is higher so we want to look at that and the output power too.  See figure6.png below. To look at this level of power we will use the power equation of V(TP_1)*I(C1) for E*I.  In our 20 second plot we can see that the peak to peak power level is 1.867W so please note the scale of the plot from 0.9W to -2.4W and compare this to the micro-watt scale of the previous plot of V1 power.

In figure7.png we are looking at the output power across R1.  Figure8.png is a close up of the output power waveform at around 20 seconds

Now the last thing I want to look at here is whether or not we can maintain the level of induced power on TP_1 for 60 seconds of simulated circuit time so we will look at the results of that plot (figure9.png below), where we will begin the plot at 0 seconds with no offset delay such as we used before, and it begins with a negative voltage spike, then at about 6.4 seconds in we see our 7.6 Hz resonance kick in that raises the voltage on TP_1 to 22.6V DC after about 9 seconds into the simulation. The thing we are looking for here is that the circuit will maintain this level of induced voltage from here on out, and hence the resultant level of induced power at this point to use as the source of power with V1 supplementing the losses after V1 has used a high level of  power to initially start the circuit up.

Now as the circuit progresses it looks to still be stabilizing over the span of 60 seconds.  And it appears that we might have another lower level resonance on TP_1 that is below 1 Hz, which would not surprise me considering the high inductance of the transformers and use of a 1 Farad capacitor.  We have 1.25 H in series with C2 which creates a resonant series circuit of 0.142 Hz). Only a much longer simulation will determine if this is the case which is a very long simulation even for my dual core processors. I would need a 4 to 8 core processor which about 16 Gb of RAM to speed up these simulations.  Anyways it looks as if the circuit is still undergoing stabilization coming down to 60 seconds and beyond, which I think should be expected with the inductances used here.

The end result of this simulation then shows that after the charge and voltage on C1 stabilizes due to being charged up by a 7.6 Hz resonance, at about 12 seconds on toe 60 seconds we have a 1.3V DC drop at TP_1 as the circuit moves on to 60 seconds.  We might also have reason to suspect a 0.14 Hz oscillation is showing up in this voltage plot also, but that has yet to be determined by a longer simulation.

Ok a test model for this is located below as sonic resonator2a.zip for use with LTSpice.

My conclusions to date are that it is possible to use resonances in a circuit to induce voltages and currents that can be stored for power use in the circuit.  With some detailed math analysis of everything we will be able to better design circuits to do this with some stable circuit performance results.  In effect we are looking now at a peculiar resonance generator circuit able to induces its own power back into the power input section, which demonstrates it is possible and is worthwhile exploring further.  And I think this is now something significant as opposed to my original failed attempts at this idea back in 2009. 

I will have to also comment that originally this circuit idea concept failed me back in 2009, and so I just dismissed it altogether until people showed an interest in running the circuit simulations out of curiosity and then I come back to see what theses circuits were they were running and decided to undertake to explain why they fail in concept, only to have my attempts to setting up experiments to disprove them open up new views of how to use them.  I had a few failures recently but somehow they get turned around and then I was back on track again.  And if I had not run a 60 second simulation to check things I would not have discovered this unexpected level of power generation at the junction of TP_1 which exceeds my earlier findings of operation in the previous post in these threads, so at this point I am sort of scratching my head.

Now I really do need to find manufacturer data on a 1H transformer to insert the real world data into the model with some resistance which only lowers the DC current from V1 to Q1.  That will be my next task perhaps today if possible.  If I can find a transformer of this level of inductance.

http://www.charlesindustries.com/main/transformers_datasheet.pdf

[D.R.Jackson]

I found out at what point in the circuit that the 7.6 Hz resonance starts, it starts once C1 which is a 1 Farad capacitor has fully charged.  I tried to run a simulation for 600 second (10 mins) but the capacity of my PC only allowed 240 seconds.  My hope is that my notion that C1 with L3 and L2 in series results in a resonance in that section (which is around ~ 0.142 Hz) that will charge C1 up and down over time in accordance with that resonance.  There really is no reason for it to discharge based upon the DC functions of the circuit since there is a DC source of supply constantly on C1.  If you look at it now, it appears that the charge up of C2 to around 22.4V is finding its way back to TP_1 and depositing that same voltage there since the DC functions of the circuit see the inductors as mere conductors in the circuit.  And since the slope on TP_1 is extremely long instead of discharging it appears to be following a very low frequency curve or resonance and so the series reactances I believe account for what I believe I am seeing.

[D.R.Jackson]

Ok we can summarize a few things:

In light of the findings so far and anyone's interpretation of what is occurring on C1 in the circuit of my previous post, referring back to figure1.png, this circuit is designed from the very beginning to store a charge at TP_1 without the need of the high value 1 Farad capacitor in the previous circuit.  So you must not forget that part and keep that in mind.  My original vision is that the resonance of the inductances would store power on C1 and to some extent do and then again when the 7.6 Hz resonance starts, which occurs when C2 has charged up.  So it seems to be a cascading effect.

To illustrate this in terms of the original concept circuit model in the snap shot below we see the input power in watts for V1 as the green plot, and the power of TP_1 (red wave form plot) which is the voltage at that point and the charge in C1 in which we can see is much higher than the power of V1.  And then we have the power across C2 which is the blue waveform plot.  Hence power induced in the circuit is stored on C1.

In the final circuit version with power being loaded into R1 we now can see that the charge across C2 leading to 22.4V in the circuit can not draw up current through the power supply because D1 blocks that as the 22V increases up on TP_1. We find that power in the concept circuit is designed to be stored at TP_1 and the power across C2 has no place to go put add to that which is stored at TP_1 by raising its voltage. 

In the circuit below power is stored and taken from C1 which does not add a voltage to TP_1, where we can analyze this power as seen in the below circuit.  In the final version that is loaded with R1, C2 increases the voltage on TP_1 which increases the ratio of input power to output power even more, for a circuit already capable of producing some of its own energy from the beginning.