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Overunity Machines Forum



Successful TPU-ECD replication !

Started by mrd10, June 12, 2007, 05:12:47 AM

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0 Members and 25 Guests are viewing this topic.

z_p_e

Rob,

If you want to generate fundamental, first and second harmonics, you are going to require a divide by 1.5.

That's why I posted my circuit a while back.

A divide by integers only circuit will not do this I think.

Regards,
Darren

MeggerMan

@Darren,
Quote from: z_p_e on June 28, 2007, 08:50:10 AM
If you want to generate fundamental, first and second harmonics, you are going to require a divide by 1.5.

Thats easy, double the master clock frequency and do a divide by 3.
You just need to multiply up all the divisors to integers then use the divide by whole numbers, much easier and a lot more flexible I think you'll agree.
Rob

ronotte

@Darren, Rob,

I agree Rob: that's the normal way I followed some time ago and it is valid. Thanks also for your building info about DDS20, hope you will send me your English translation ...when completed! Please find attached a design I made few days ago for freq generation it may be of interest for all.

Darren, the 3 freq are important and should be simulated. I'll give you the correct numbers...but have to reconnect firstly the original ECD to be congruent.

Please take also in account that in actual operation it make sense to set up the oscillators as follows (for standard ECD as per doc TPU=ECD):

F1 in a range 10-40 KHz
F2, F3 in range 100 - 240 KHz set up as 1st and second harmonic, for example 50 and 100KHz synched)

The F1 job is just that of controlling the Seed so it may be asinchronous. Of course if the transition points of this signal are synched as well ....the better.

Roberto


z_p_e

Quote from: MeggerMan on June 28, 2007, 09:32:14 AM
@Darren,
Quote from: z_p_e on June 28, 2007, 08:50:10 AM
If you want to generate fundamental, first and second harmonics, you are going to require a divide by 1.5.

Thats easy, double the master clock frequency and do a divide by 3.
You just need to multiply up all the divisors to integers then use the divide by whole numbers, much easier and a lot more flexible I think you'll agree.
Rob

Easier depends on what you want to achieve for flexibility. For pure f1, f2, f3, the circuit I posted is the easiest, and was not meant to be flexible in regards to generating anything other than f1, f2, and f3.

Going back to SM's material, this is what is required, and I tend to stick to what the inventor has told us. Any changes or deviations, and we're no longer building strictly to the few undisputable facts he has given us.

Darren

ronotte

Hi Stefan,

pic 2296 has been shot in following conditions:

- test-ECD equipped with only 1 CC (Control Coil) with 2 secondarys.

- Load (60W/230V Lamp) is connected to the second secondary so it happens that it is completely isolated from the ECD itself.

- PS V=+13V.

- PS I= 3.2 A.

- 3 freq used

- sine percent reconstruction about 20%

- no ECD tampering on PS

A brief computing led me to calcolate the COP near the unity.

Roberto