TK:

That was a great clip where you added the inductor between the batteries.

If you look at the two scope captures you can see the capture with the extra inductance is a more exaggerated version of the regular inductance version.

You know in these forums we are always suffering from a lack of information and of course it takes time and effort to get that information.  I am hoping that you will be willing to do some more investigation, no need to make a video clip.

I am going to discuss the case with the extra inductance.  Understanding this case will allow you to understand the regular case.

Here is my theory:  When you see the battery voltage take the sharp fall, that's when the MOSFET switches on.  After about 1/2 a cycle, that's when the MOSFET switches off.

The MOSFET switching on quickly pulls the voltage low for two reasons.  Firstly, it is discharging the distributed capacitance consisting of the MOSFET DS capacitance and the stray capacitance in the wire.  Secondly, the inductance in the wires and the big coil "rejects" the MOSFETs "desire" to increase the current flow.  So the inductance puts on the brakes, and the microscopic capacitance quickly discharges when the MOSFET switches on.

So after about half a cycle the MOSFET then switches off.  By this time some current has started to flow in the wires again, and you have stored some extra magnetic energy in the big coil.  So the sharp rise in the "battery voltage" is simply your big extra inductor wanting to keep the current flowing, but it finds that the MOSFET is switched off.  So the inductor has "no choice" and it charges up the MOSFET DS capacitance and the entire interconnect wire capacitance between the coil output and the MOSFET drain to a high potential.

I hope that everyone is following.  I will continue in a second posting.

MileHigh

Quote from: Groundloop on May 15, 2012, 01:52:22 PM
Now explain why the there is a LOWER current going through the MOSFET when we put a 90mA current
through the Drain Source.

Actually, the MOSFET current INCREASES when the bias (Q2) is added. The load current DECREASES when the bias (Q2) is added.

The reason for the difference between Q2 present and Q2 absent, is because the RDsON state of Q1 changes in each case. In other words, the bias condition of Q1 changes.

Quote
Next question, what is the total resistance the 12 Volt bias must "see" to be 90mA through the circuit?

It is more than simply "resistance". There are two voltage sources bucking each other in series, and one must consider that as well. See my updated drawing below. I had to correct the measurements because I forgot to remove the 2 Ohms of wire resistance between the batteries and the circuit in my last simulation (I used the NERD circuit with all the wire inductance and resistance).


The bias current is calculated as follows:
- Determine the voltage at point "V": 1.84A x 11 Ohms = 20.24V across Rload.
- Now subtract from 24V to get 3.76V.
- Now subtract from the 12V bias supply to get 8.24V and
- Divide by the total resistance of 50 + 4.8 (for the diode, or use 11.3V vs. 12V) = 150mA
(there is probably an easier/quicker way, but the above is a simple explanation)

Quote
Last question, what is the total resistance the main current from the 24 Volt must "see" to be 1,74 Amp?

In the case shown below, 13 Ohms, which is just about Rload + RdsON. But I hope you understand that it is a little more complicated than that, as you saw above for your other related question.

Quote
Sorry for all the questions, but I really like to know what is going on in the circuit.

GL.

No problem. As a point of interest, note the indicated VGS voltage and the ON resistance for Q1?

@MH:  I'll watch all right.  You did see that I corrected the value of that inductance, I hope.

I misread the meter as nH when it was telling me uH. That's what I get for being so pysplexic. The correct inductance is about 28 microHenry, not nanoH. .99 poynted out that the nH value was implausible, and I certainly should have known better. No more posting before that second cup of coffee for me !! Sorry about that.

It's a bit more than necessary to show some effect... but now I know roughly exactly how much to add to get down to whatever frequency is deemed nominal for the oscillations. If I use about a third of that and scatter it around, I should wind up close to 1.4-1.5 MHz.

TK:

Okay, so continuing on with the discussion.

There are a few big unknowns relative to my discussion.  We don't know the actual timing of the "virtual gate" signal.  I am making an assumption of what the "virtual gate" signal might be, but I am not sure.

We can derive what the "gate" signal looks like by looking at the Q2 array source pin.  i.e.; the negative output from the function generator or function generator equivalent.

So in the quest for more information, the request is to see what the timing on that signal is.  So assume that you keep triggered on the "battery voltage" you look at the Q2 array source pin.  (Or you just have a single Q2 in this test setup if I remember correctly)

So now you have three signals, the battery voltage, the CVR waveform, and the Q2 source pin voltage and you know the precise timing relationship between all three.  And we are "molasses in January" about 600 KHz, yippee!

Here is were I recommend you go low tech.  Get a pencil and some graph paper and sketch out the three waveforms based on your scopeoscopy with all of the proper timings.

For a really helpful bonus, you can also sketch out some derived waveforms.  You can sketch out the gate voltage, which is just the ground (possibly CVR) potential minus the Q2 source pin voltage.  (Just to make it easier on the brain.) You can also sketch out the MOSFET DS capacitance voltage!  It's just the battery voltage minus the Q2 source pin voltage.

To be really picky, it might be worth it to verify the propagation delay for the MOSFET switching on.  You are happily running at a lower frequency so it's probably not an issue.

Ooops, another verification I almost forgot.  You have one probe on the battery voltage.  Put the other probe on the MOSFET drain pin.  If my theory is correct they should be almost identical.  This would tend to confirm that the MOSFET DS capacitance and the wire length capacitance are charging up like I am suggesting.

Okay, now you have a cool timing diagram to show in a clip.  We do NOT need to see you do this live with one hand - if you choose to do the investigation.

Assuming that you have the waveforms, then next question is does everything fit together like I am suggesting?  Maybe I am wrong.  After all, I don't have all of the information.  Look at all of the relationships, what can be concluded.  What about the current reversing direction?  Do we have a handle on that, etc?

Supposing that I am right.  That would tend to suggest that we are now able to tie in the wire inductance effects with the exaggerated battery voltage.  It also explains the greatly reduced battery voltage.  If we are really confident of this, then we have a chain of evidence to support the idea that the "battery voltage" is not actually the true battery voltage.

MileHigh

Poynty

I still don't get it.  Are you describing what would be happening under ideal circumstances when the switch is 'on'?   Because otherwise I fail to see the relevance.  Please let me know.

Regards,
Rosie