Rosemary Ainslie circuit demonstration on Saturday March 12th 2011

[Rosemary Ainslie]

Guys - I'm very aware of the fact that my comments are not appropriate without reference to a schematic.  I'll get back here with some version of this - even if I have to draw it myself.   But Poynty - thanks for your work here.  There are a few aspects of your own schematic - which may work - but I'm not sure that it's what we're doing.  In fact there are plenty of differences.  But as ever I'm open to correction.

I'll get back here by midday at the latest.  I'm now on a mission to learn how to 'sketch' these things more easily.  lol.  One hopes I'm not too old to learn.  And I'm very grateful for your work here Poynty.  As ever, you keep me on my toes.

Kindest regards,
Rosie

[Rosemary Ainslie]

I think it would be beneficial for all at this time to refresh ourselves with the workings of a N-channel MOSFET.

Rose, would you please explain for the readers in a paragraph or two, and in basic terms, how a MOSFET functions? With respect to it's 3 pins, describe what external conditions are necessary on each pin in order to enable the MOSFET to pass a significant current.

Thanks,

.99

I missed this.  I absolutely cannot answer this with authority.  But as I understand it the drain is always open until it's linked to the source through the applied charge at the gate.  Those body diodes kick in when there's a reverse voltage and they're basically designed to 'snuff' all that counter electromotive force.  BUT.  The thing is this.  With that transposition and with the applied 'negative' voltage - then the FET Q2 is actually operating precisely in line with it's polarities with respect to the drain.  It just sees the drain as the source.  But I'll sketch it.  I've already done this.  I just need to get this presentable. 

Kindest regards,
Rosie

[Rosemary Ainslie]

Guys - I had to get someone to  do this.  It was either that or one of my scribbles - and this way it's still legible.    Sorry to modify your excellent work there Poynty.  Hopefully you'll not mind  too much.

In any event - here's how the circuit actually looks.  Except that the signal generating battery has replaced the functions generator.  Ron.  I hope you're getting this.  I have no idea how one now applies that switch to get the modifications required for the input current from Vbatt source. 

And Poynty.  I hope this schematic makes it all clearer.  In effect we have enabled that negative current flow through the simple expediency of changing the polarity of the MOSFET.  It is still doing what it is expected to do but - relative to Q1 - Q2 is reading the charge in reverse.

In effect, the counter electromotive force is still 'positive' relative to the FET Q2.  So that transistor component still conforms to its design intentions.  Note that the Gate source has been shown as  'reversed' because relative to the signal generating battery - the FET Q2 - sees the source as the drain and vice versa. 

Hope that helps.
Kindest regards,
Rosie

ADDED.  Btw.  There polarity of the zener at Q2 is not correct.  Strictly speaking it should be shown in antiphase - I think.  Am open to correction

[poynt99]

I missed this.  I absolutely cannot answer this with authority.  But as I understand it the drain is always open until it's linked to the source through the applied charge at the gate.

This is getting to the essence of it's operation, but one or two key points are still absent in that description.

With respect to the voltage between the Gate and the Source (V_GS), have a look at this Wiki page where they show how the Drain-to-Source channel is altered by the voltage applied to the Gate.

In the graph they are plotting I_D with respect to the applied V_G (V_G really means V_GS (Gate-to-Source voltage)).

What may we conclude from that animated graph? Is the MOSFET Drain-to-Source "channel" always connected, or is there a certain V_GS voltage that must be reached first?

http://en.wikipedia.org/wiki/File:Threshold_formation_nowatermark.gif

.99

[poynt99]

Rose,

Unless the demonstration video footage is not authentic, I have already painstakingly well established what the actual "AS-BUILT" circuit connections are and posted them. Have you seen those posts?

It is quite clear from the video footage that the actual schematic is per the one below, with the exception for the function generator, shown here as a fixed DC source. In particular, the CSR is most definitely connected to the Q1 source and Q2 Gate as shown.

Why are you changing the pin designation on "Q2-5"? The "g" means "gate", and "s" means "source".

Regarding that small capacitor in parallel with the load, it is of course not a discrete component of the load, but all inductors have some capacitance associated with them, and it was included only to allow for a more accurate simulation. The consequence however of removing it is minimal. It is of no concern in actuality.

.99