Kapanadze Cousin - DALLY FREE ENERGY

[NickZ]

  Well, I'm glad that you found something that you think is real. The Stepanov device is another example of a simpler non-nanosecond type of technology. As well as the Vasmus device, which were both self running.

   Previously a spark gap is what was doing the job, now you need 100 components, that still can't reach the 5kv output of the Kapanadze garden device.  No eye candy here:


   
 

[AlienGrey]

Dog-One I have no idea ! but to tune a coil you need a frequency counter and a Voltage controlled oscillator like a HEF4046 circuit feed pin 9 into two 2 leds red one, one way and the other in the reverse direction, feed the output of the leds too the coil and as you hit harmonics of the coil resonance the leds will get brighter and brighter when they are brightest read the frequency off the frequency meter or use a scope, or grid dip osc it's the only way the armature can do it. no idea how to do the rest as the way they are wound. but If you don't really know what your doing or don't have a clue forget it.

[TinselKoala]

Almost right. The 4046 Pin 9 is the VCO _input_; the voltage on this pin controls the frequency of the built in VCO. The raw VCO _output_ is Pin 4.

http://www.youtube.com/watch?v=XMQkCW5vZVc

(This video has the most "thumbs downs" of all my recent videos! Something in there is really rubbing my personal trolls the wrong way. Sorry, no tits or beer.)

[Dog-One]

Thanks TK.  That video is quite helpful.

So I'm looking at the 4046 spec sheet and I see the basic setup.  Can anyone explain why Ruslan adds another low-pass filter between the VCO output and the comparator input?  Is it because there are many harmonics the PLL could lock on to and he only wants the lowest one?  And do we know if this lowest harmonic is actually the fundamental?

Also note the main low-pass filter has a 5.6k resistor in series with the capacitor.  What is the purpose of this?  To slow down the lock even more maybe?  Why would that be?  Is this PLL circuit specifically designed to jump back-n-forth between two different frequencies?

See what I'm getting at guys?  It looks easy, but it's far more complicated than it appears.  You can't just slap this gizmo together and bring'th light.  You have to know how it works and define your tuning steps around that knowledge to get anywhere.  If I had those tuning steps and followed them carefully, I "might" begin to understand how this device works and why the circuit is the way it is.

[lost_bro]

Thanks TK.  That video is quite helpful.

So I'm looking at the 4046 spec sheet and I see the basic setup.  Can anyone explain why Ruslan adds another low-pass filter between the VCO output and the comparator input?  Is it because there are many harmonics the PLL could lock on to and he only wants the lowest one?  And do we know if this lowest harmonic is actually the fundamental?

Also note the main low-pass filter has a 5.6k resistor in series with the capacitor.  What is the purpose of this?  To slow down the lock even more maybe?  Why would that be?  Is this PLL circuit specifically designed to jump back-n-forth between two different frequencies?

See what I'm getting at guys?  It looks easy, but it's far more complicated than it appears.  You can't just slap this gizmo together and bring'th light.  You have to know how it works and define your tuning steps around that knowledge to get anywhere.  If I had those tuning steps and followed them carefully, I "might" begin to understand how this device works and why the circuit is the way it is.

Good day Dog-one

When the type II comparator, pin#13 on the CD4046 PLL IC is selected as in your attachment, the * signal-in* (pin#14) can be gated and still maintain a *lock* on your target frequency. This technique allows power control by  *throttling* or *gating* the primary signal.

Type I phase comparator (pin#2) requires a 50% D/C to maintain lock.   

But more importantly, pin#13 type II phase comparator will *not* lock onto any harmonic, it only locks onto the fundamental / first harmonic........... this is the primary difference between Pin#2 phase comparator type I & Pin#13 phase comparator type II.

I have noticed that none of Olega design have used Pin#2 (typeI phase comparator), all his designs are engineered to lock onto the fundamental using Pin#13 (type II phase comparator).

The schematic from Ollega use pin#13- typeII PHASE comparator, don't know if he is *gating* the signal.........
Only drawback is the TypeII comparator is much more sensitive to *noise* so good board layout / design is essential.
Almost all designs for DRSSTC I have seen use Pin#2 TypeI phase comparator for that very reason (noise immunity).

take care, peace
lost_bro