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Overunity Machines Forum



Ultracaps tested for excess energy

Started by PaulLowrance, November 30, 2009, 12:47:01 PM

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0 Members and 3 Guests are viewing this topic.

PaulLowrance

Maybe the proposed data logging measurements are not clear. The reason for data logging is to obtain detailed information about the ultracap over the entire charge and then discharge process. Both current & voltage will be logged during the entire process of the ultracap being charged starting at 0.0V to a few hundred milli volts, and then discharged. This will provide the total amount of energy that went into charging the ultracap, and the total energy from the ultracap during discharge. The charge current will be fixed at ~ 22mA. The discharge current will be considerably higher.

Paul

MileHigh

Paul:

Correct me if I am wrong, but your line of investigation is that you charge the cap slowly and measure the capacitance and voltage you know approximately how much energy is in the cap.  Then if you discharge the cap quickly or in some other fashion and can deduce that the capacitance is larger, the you have shown OU.

What I am saying is that if the capacitance changes and the amount of charge on the capacitor remains the same, then the voltage on the cap will go down all by itself without any discharging.  You will measure a larger capacitance with delta-Q/delta-V, but the voltage on the cap at that instant in time will have dropped.  You will not get more out of the cap than you put into it by changing the discharge rates.

With respect to the apparent increased measurement of the capacitance, I don't think that is related to the temperature of the cap going up.  The effective series resistance of the cap is very low, so my gut feel is that the temperature of the cap will rise marginally, but this will not affect the measured capacitance.

I can offer up a theory.  I am not an expert in supercaps, I only read up on them a tiny bit and I was also skimming.  Since the separation between the "plates" is so small (something like 20-40 microns) and the dielectric layer is some sort of flexible layering of molecules, I am going to assume that it is "spongy" based on your results.  Whatever the dielectric layer is made up of, for sure it is some sort of flexible ultra-thin membrane.

As the capacitor charges up to higher and higher voltages, the attraction between the "plates" of the capacitor gets higher and higher because of the opposite charges attracting.  So as the capacitor voltage gets higher and higher there is an ever increasing attraction force and this squeezes the dielectric layer and makes it a tiny bit thinner.  Suppose for the sake of argument that the dielectric layer separation goes from 40 microns thick to 35 microns thick when the capacitor is charged to its maximum voltage.

This decrease in the thickness of the dielectric layer results in the supercap having a higher measured capacitance.  That's my theory for your consideration.  I would not be surprised with enough Google searching that you would find the true explanation and I may not be right, but at least on track.

Note also that this is what your data is showing.  The higher the voltage the higher the measured capacitance.  My theory is based on your data and my limited knowledge about supercaps and good overall knowledge of electronics.

For those that don't understand why decreasing the thickness of the dielectric layer increases the capacitance, Wikipedia awaits you.

MileHigh

MileHigh

Hey Paul,

A few more thoughts for your consideration.  I will assume that your printer port/ADC chip data logging setup can plot your acquired data.  I will also assume that your current source is a true constant current source, especially considering the low voltages that you are working with.

If the capacitance does not change as you do a slow charge then the voltage vs. time plot should look like a straight line (you can set it to 45 degrees for example).

If the capacitance does increase then the voltage vs. time plot should look like some sort of curved line with the slope decreasing.

If you get this plot than you can test your thermal theory to see if it explains the phenomenon.

It's a bit of a pain but if you put the setup near your sink and somehow arranged for a continuous slow flow of tap water with the cap sitting in the water, then you will remove any excess heat from the cap as the test runs.  Let's assume that your tap water will be a constant temperature.

So with the cap in a flowing "water jacket" you rerun the test.  You know that the cap temp will pretty much remain constant and you can check out what the voltage vs. time plot looks like to see if the capacitance is changing or not.

Finally I want to mention that Poynt gave a link about the issues involved for measuring the values of capacitors.  The effective series resistance does come into play because the higher your current the more energy lost in charging or discharging.  I think that the paper stated that the "safe" way to measure a supercap using the 37% method was to do a very slow discharge over hours using a relatively high resistor value.  It was a very informative paper and you might want to find the link if you haven't read it.

MileHigh

Pirate88179

See the Joule thief Circuit Diagrams, etc. topic here:
http://www.overunity.com/index.php?topic=6942.0;topicseen

electricme

Hello Paul,

I think what you are doing here is excellent research, the outcome is to prove or disprove weather the type of cap is capable of doing or not doing what is claimed.

Unfortunatly, the process tends to pull out of the wood work a number of positive and negative comments, remarks etc.

Just go ahead, do the appropiate test, then present your findings, people will then have a choice to accept them as accurate.
If anyone feels otherwise, well, it's a free world, make you own test, but if you do so, be unbiased, make it all transparent and present your testing alongside Pauls.


@ Gadget,
Nice to catch with you, Hows it going cobber.

jim
People who succeed with the impossible are mocked by those who say it cannot be done.