Quote from: picowatt on June 19, 2013, 03:10:15 PM
.99,

At -10volts open circuit, you are probably only going to see 120-150ma of DC current thru Q2, which is why I suggested a 150ma fuse.  I'd size the fuse with the smallest ma. rating you can reliably get away with (fast blow of course). 

If you have a couple 10-15volt zeners, a pair of them in series "back to back" at the PG output would help to clamp any overvoltage until the fuse blows or during the fuses brief arc currents.     

PW

PW, 10V into 50 Ohms is 200mA, so we know it can handle that forever. I'm quite sure it will handle 250mA as well without a problem. The other thing to remember is that the FG current when connected in the circuit can be well over 200mA. At least that is what I see in the sims.

Quote from: poynt99 on June 19, 2013, 07:44:22 PM
PW, 10V into 50 Ohms is 200mA, so we know it can handle that forever. I'm quite sure it will handle 250mA as well without a problem. The other thing to remember is that the FG current when connected in the circuit can be well over 200mA. At least that is what I see in the sims.

.99,

I was using 3.5V to 4V as Vgs(on).  At the lower 3.5V:

(10-3.5)/50=130ma

In any event, I would be as much or moreso concerned about an overvoltage spike as I would be an overcurrent event.     

Looking forward to your tests!

PW

Quote from: poynt99 on June 19, 2013, 07:37:04 PM
Any period can be used to demonstrate Fig. 3, but I have no intention of blowing any MOSFETs so I won't let it burn at 72V for x number of minutes. At that range of period, there's almost no need for any switching; just tie the Gate to +12V and wait till it pops.

I showed Fig. 3 in the simulation, and I didn't use a "minutes" period. Same can be done on the bench. The point in my mind for that test is to determine whether it is possible to achieve that wave form with a functioning and properly-connected Q1. One doesn't need a "minutes" period to do that.

I know TK you want to prove that Q1 is going to pop under such conditions and that the wave forms of Fig. 3 will appear by default. But I'm not interested in pushing the tests to the point of destruction. I'll try to show Fig. 3 with a much shorter period and a 10% duty cycle.

Yes, that's right, because Ainslie has claimed that it won't even get warm, and every one of her bogus claims needs to be refuted whenever possible.
But fine, of course it is possible to make the waveform at shorter periods. I've posted Ainslie's scopeshots that show it, and.... it appears that you mean.... you'll do the same thing I did, in my last 2 videos, which is to show both the Figure 5 traces (current flowing in a working mosfet) and the Figure 3 traces when the Q1 is pulled, at another "usual" operating frequency of around 1 or 1.5 kHz. Plus as a bonus I also showed how to test the mosfets quickly afterwards. The long period is, as you say, to show that the Q1 mosfet will indeed heat significantly (as long as it is actually working). If you are happy to acknowledge that without actually testing it, that is fine with me. But will Ainslie agree with that and also then acknowledge the same thing? I doubt it.

Quote
At some point later I might just connect the Gate to +12V with a 72V supply and monitor the FET temperature. I'll let it get to maybe 120ºC or so then stop the test (unless it pops before that point).

Are you going to "bring water to boil" while duplicating the Figure 3 scopeshot, or do you agree that that is also impossible and not worth demonstrating.... or do you have some other opinion about that?

@MileHigh: When I was testing Tar Baby, people made all kinds of suggestions to me. Remember?

Quote from: picowatt on June 19, 2013, 08:48:15 PM
.99,

I was using 3.5V to 4V as Vgs(on).  At the lower 3.5V:

(10-3.5)/50=130ma

PW

I'm curious why I would need to protect it to a level well below its output capability? It might just start blowing fuses left and right.

But what circuit is she actually using? Is .99 even working with the right circuit?

QuoteThanks for this Poynty.  It's not quite right because that waveform hardly varies from yours and we have all those FETs paralleled.  The math here is just WAY beyond me.  But it's all going to be very well referenced in that demo.  What I DO know is that there's very little variation to the amplitude of that waveform regardless of the input.  This speaks to the fact that it's some property in the FET's that organises that oscillation - whatever it's cause.  BUT. In the final analysis - it's like picowat's claim that the FET is blown.  So what?  It promotes efficiencies.

You must always remember that we duplicate that waveform from a single supply and without the use of the function generator. This is the proof that there's no alternate power supply to the circuit - needed for the oscillation.  In the final analysis we're probably taking a first look at the real benefit behind those oscillations.

Not with the circuit she claims to be using. As we know, for the oscillations to happen there has to be a source of negative bias current. This can indeed come from the running batteries.... but requires additional circuitry, none of which Ainslie has ever posted.

But I have.