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Overunity Machines Forum



another small breakthrough on our NERD technology.

Started by Rosemary Ainslie, November 08, 2011, 09:15:50 PM

Previous topic - Next topic

0 Members and 18 Guests are viewing this topic.

poynt99

Quote from: Rosemary Ainslie on January 21, 2012, 09:58:42 AM
And I MOST CERTAINLY DO NOT STATE THAT THE ANSWER TO YOUR QUESTION IS POSITIVE.
Sorry deary, by default, that is your answer.
Quote
LOOK AGAIN.  It is absolutely NOT in reverse.
I would suggest you look again, and not just assume. Even one "blind as a bat" can see that the two MOSFETs have their Gates and Sources reverse-connected.

Quote
If Q2 is ON when Q1 is OFF then it is getting it's positive signal via the SOURCE.  That would be a non-standard application at BEST.
Q1 is NEVER ON. Q2 is ON when the FG applies the positive signal across G-S.

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Are you even aware of the circuit?  I though you knew it.
Quite so. Better than most I expect.

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After all you simulated our resuts.  PERFECTLY
I did indeed. That should tell you something.

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WHAT -5 or even +5 volts are you referring to.  We have NEVER APPLIED that much voltage anywhere at all.  At the most there's 2 volts applied.
Indeed? You've no doubt tried a whole range of offset and pulse voltages, one of which I know for some time was -5V. Several voltage levels will work, as long as Q2 is biased ON.

You should have a look at your own first paper, FIG.3. The blue trace, channel 3 is set for 10V per division, and the signal appears to cross almost two full divisions. Using your impeccable math skills, what does "2 x 10" equal in your world?

Quote
CONCENTRATE POYNTY.  The probe from the signal generator is applied DIRECTLY to the gate of Q1.  The GROUND of the probe from the signal generator is applied directly to the SOURCE.  THEREFORE - when the signal from the probe reverses to apply a negative at Q1 - then at that moment the POSITIVE signal would be applied directly to the source - which is NOT THE GATE OF Q2.
Golly, that is so FUBAR'd. You have no idea how the hell anything works. Q1 NEVER GETS TURNED ON. IT CAN"T! You are always applying a negative or zero VGS to Q1, therefore it can never be turned ON. And open your eyes; Q1's Source is most definitely connected to Q2's Gate.

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You are attempting to persuade all and sundry that there is an applied positive signal at the GATE of Q2 because the MOSFETS are REVERSED.  They are not.  That would call for an ENTIRELY DIFFERENT CIRCUIT CONFIGURATION TO THE ONE THAT WE'VE DISCLOSED AND INDEED THAT WE USE.
Look again. You are the only one that can not see it Rosemary.

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Explain, if you can, how it is that the THE APPLIED NEGATIVE AT THE GATE OF Q1 generates a positive at Q2 given that those FETS ARE NOT REVERSED AS YOU'RE PROPOSING?  Because they assuredly ARE NOT.
They are indeed reversed; how many times must you be advised? Surely at least one of the three readers here could oblige to assure Rosemary of this fact?

.99
question everything, double check the facts, THEN decide your path...

Simple Cheap Low Power Oscillators V2.0
http://www.overunity.com/index.php?action=downloads;sa=view;down=248
Towards Realizing the TPU V1.4: http://www.overunity.com/index.php?action=downloads;sa=view;down=217
Capacitor Energy Transfer Experiments V1.0: http://www.overunity.com/index.php?action=downloads;sa=view;down=209

poynt99

Quote from: Rosemary Ainslie on January 21, 2012, 10:34:17 AM
For clarification - let me add this.

FAR FROM BEING REVERSED. 
.   The GATE OF Q1 is connected DIRECTLY to the GATE OF Q2.
.   The DRAIN OF Q1 is connected DIRECTLY to the DRAIN OF Q2
.   The SOURCE of Q1 is connected DIRECTLY to the SOURCE OF Q2.

What you're proposing is that
.   The GATE OF Q1 is connected DIRECTLY TO THE SOURCE OF Q2
.   THE DRAIN OF Q1 is connected DIRECTLY to the DRAIN OF Q2
.   The SOURCE OF Q1 is connected DIRECTLY to the GATE OF Q2.

IF it were the latter configuration - then your argument would hold.  I trust that makes it clearer.  In effect when we apply a negative to the gate of Q1 it is SIMULTANEOUSLY being applied to the Gate of Q2.

Go check that configuration again Poynty.  After all - it was you who brought it to everyone's attention.  Which did NOT do the damage that I suspect you hoped.

Kindest again,
Rosie Posie

Good grief, what is wrong with you?! Could someone please advise Rosemary that she has made some serious errors here?
question everything, double check the facts, THEN decide your path...

Simple Cheap Low Power Oscillators V2.0
http://www.overunity.com/index.php?action=downloads;sa=view;down=248
Towards Realizing the TPU V1.4: http://www.overunity.com/index.php?action=downloads;sa=view;down=217
Capacitor Energy Transfer Experiments V1.0: http://www.overunity.com/index.php?action=downloads;sa=view;down=209

poynt99

Quote from: Rosemary Ainslie on January 21, 2012, 10:34:17 AM
For clarification - let me add this.

FAR FROM BEING REVERSED. 
.   The GATE OF Q1 is connected DIRECTLY to the GATE OF Q2.
.   The DRAIN OF Q1 is connected DIRECTLY to the DRAIN OF Q2
.   The SOURCE of Q1 is connected DIRECTLY to the SOURCE OF Q2.

What you're proposing is that
.   The GATE OF Q1 is connected DIRECTLY TO THE SOURCE OF Q2
.   THE DRAIN OF Q1 is connected DIRECTLY to the DRAIN OF Q2
.   The SOURCE OF Q1 is connected DIRECTLY to the GATE OF Q2.

IF it were the latter configuration - then your argument would hold.  I trust that makes it clearer.  In effect when we apply a negative to the gate of Q1 it is SIMULTANEOUSLY being applied to the Gate of Q2.

Go check that configuration again Poynty.  After all - it was you who brought it to everyone's attention.  Which did NOT do the damage that I suspect you hoped.

Kindest again,
Rosie Posie

Here is the diagram from your first paper. It clearly shows the configuration that "I am proposing" according to you. I am not proposing anything at all, as you can see it simply IS how it is.

.99
question everything, double check the facts, THEN decide your path...

Simple Cheap Low Power Oscillators V2.0
http://www.overunity.com/index.php?action=downloads;sa=view;down=248
Towards Realizing the TPU V1.4: http://www.overunity.com/index.php?action=downloads;sa=view;down=217
Capacitor Energy Transfer Experiments V1.0: http://www.overunity.com/index.php?action=downloads;sa=view;down=209

Rosemary Ainslie

Quote from: SchubertReijiMaigo on January 21, 2012, 09:40:54 AM
Rosemary Quote:
"The MOSFET is an 'N' type.  Therefore a negative signal at the gate OPENS the circuit.  The battery is then DISCONNECTED.  NOTWITHSTANDING WHICH we get a CONTINUOUS OSCILLATION DURING THE PERIOD THAT THE SWITCH IS OPEN - or - THE BATTERY IS DISCONNECTED."

OK OK, the circuit is open but oscillation continue = natural oscillation due the LCR oscillator
There is no known LC oscillator that can continue to oscillate indefinitely.  They all diminish at varying rates due to damping.
 
Quote from: SchubertReijiMaigo on January 21, 2012, 09:40:54 AMC is the stray capacitance of the MOSFET L you inductance, R the wire of that inductance...
So in theory the "excess"  energy dissipated will come from oscillation...
It may be Schubert.  I just don't know.  But I do know that if I reduce the wires to almost nothing - that oscillation persists.

Quote from: SchubertReijiMaigo on January 21, 2012, 09:40:54 AMNote that you can have capacitance coupling with your MOSET !!!
Indeed.  But we'd need a level of stray capacitance associated with an IRPG50 that beggars belief.

Quote from: SchubertReijiMaigo on January 21, 2012, 09:40:54 AMBut problem effectively as noted by .99 your -5V is in reality from the battery !!! It depend how you measure the signal in rapport with the 0V...
I think Poynt was trying to infer that the signal generator was 'adding' 5 volts to the mix.  It's neither here nor there.  We're measuring double the battery voltage at the peak of each oscillation.  And that's far in excess of what the signal is using.  Quite apart from which, check our claim.  We have measured this voltage and it is negative as it relates to the battery.  Which means the supply should be REDUCED by that amount. 

Quote from: SchubertReijiMaigo on January 21, 2012, 09:40:54 AMFloating point, and floating measurement can give induce the experimenter in error sometimes, especially in electronic circuit !!!
.  INDEED.  But we have NO FLOATING POINTS - that we've been able to find.

Quote from: SchubertReijiMaigo on January 21, 2012, 09:40:54 AMSo I will still skeptic for now, but continue to study.
We are not looking for converts.  We're looking for discussions.  Nice to see that you're still prepared to look into this further.

Kindest as ever,
Rosemary

Rosemary Ainslie

MY DEAR POYNTY POINT

It is IMPOSSIBLE to use standard circuit representations as per our ACTUAL MOSFET - Q-Array as we refer to it.  The closest way to describe the configuration is this.

There are two MOSFETS in parallel.  The signal is applied to the common gates BETWEEN the two.  Which is an atypical application.  Therefore while they are technically in parallel - there is an eccentric positioning of the probe from the signal generator.  The explanation for the benefits to this configuration are explained in part 2 of that 2-part paper.

Quote from: poynt99 on January 21, 2012, 11:02:35 AM
Here is the diagram from your first paper. It clearly shows the configuration that "I am proposing" according to you. I am not proposing anything at all, as you can see it simply IS how it is.

.99

Regards again
Rosie Pose

I might add.  I distinctly recall GroundLoop giving us all a FULL DIAGRAM of the configuration.  And when I ventured to draw the configuration as I thought would be more appropriate - you used it as an opportunity to advise the world and his wife - YET AGAIN - that this was another example of how little I understood about anything at all.  More's the pity.  You'd have honed into the problem.  But quite apart from which, there has been NO ACADEMIC who has expressed the SLIGHTEST difficulty in understanding the implications of that circuit configuration as drawn.  It seems to have been not only appropriate - but more than sufficient for a description of this eccentric positioning.

Again,
Regards.